Auto-Detection in Wireless Communications

Patent metadata

Field	Value
Publication number	US-2016112157-A1
Application number	US-201414583136-A
Country	US
Kind code	A1
Filing date	Dec 25, 2014
Priority date	Oct 15, 2014
Publication date	Apr 21, 2016
Grant date	—

Abstract

Embodiments of the disclosure provide auto-detection in wireless telecommunications. Certain embodiments provide or otherwise implement a specific sequence of bits and/or symbols for auto-detection. The specific sequence of bits can be embodied in or can include output codebits from an encoder in a communication device that can send a wireless transmission including the specific sequence. In one embodiment, the encoder can compute or otherwise generate cyclic redundancy checks (CRCs) or other types of validation checks at the communication device. The specific sequence can be determined using the payload of a packet frame. Both the manner in which the specific sequence is generated and the temporal order in which the specific sequence is received relative to other payload in the packet frame can provide specificity to the sequence.

First claim

What is claimed is:

1 . An apparatus for wireless telecommunication, comprising:
at least one memory device having programmed instructions; and at least one processor functionally coupled to the at least one memory device and configured to execute the programmed instructions, and in response to execution of the programmed instructions, the at least one processor further configured at least to:
encode a first legacy field of a digital communication packet;
encode a second legacy field of the digital communication packet;
encode a third legacy field of the digital communication packet; and
encode a non-legacy field of the digital communication packet, the non-legacy field having at least two symbols and including a sequence of content bits and a sequence of cyclic redundancy check (CRC) bits.

2 . The apparatus of claim 1 , wherein the at least processor is further configured to jointly encode two symbols of the at least two symbols, the jointly encoded two symbols including the sequence of content bits, the sequence of CRC bits, and a sequence of tail bits.

3 . The apparatus of claim 1 , wherein the at least processor is further configured to jointly encode two symbols of the at least two symbols, the jointly encoded two symbols including a first sequence of content bits, a first sequence of CRC bits, a second sequence of content bits, a second sequence of CRC bits, and a sequence of tail bits.

4 . The apparatus of claim 1 , wherein the at least processor is further configured to encode individually a first symbol of the at least one of the two symbols, the individually encoded first symbol including a first sequence of content bits, a first sequence of CRC bits, a second sequence for CRC bits, and a sequence of tail bits.

5 . The apparatus of claim 1 , wherein the sequence of CRC bits includes six bits, eight bits, or 12 bits.

6 . The apparatus of claim 1 , further comprising a radio unit, wherein the at least processor is further configured to send the digital communication packet wirelessly.

7 . An apparatus for wireless telecommunication, comprising:
at least one memory device having programmed instructions; and at least one processor functionally coupled to the at least one memory device and configured to execute the programmed instructions, and in response to execution of the programmed instructions, further configured to:
decode a preamble of a digital communication packet, the preamble comprising a field having at least two symbols;
determine a sequence of content bits based at least on the decoded preamble;
determine a first sequence of cyclic redundancy check (CRC) bits based at least on the decoded field;
determine a second sequence of CRC bits based at least on a portion of the sequence of content bits;
compare the first sequence of CRC bits and the second sequence of CRC bits;
determine that the first sequence of CRC bits and the second sequence of CRC bits match; and
process the at least one packet in accordance with a predetermined radio technology protocol.

8 . The apparatus of claim 7 , wherein the at least one processor is further configured to determine that the first sequence of CRC bits and the second sequence of CRC bits are a mismatch; and
to process the digital communication packet according to a second predetermined radio technology protocol.

9 . The apparatus of claim 7 , wherein the at least one processor is further configured to determine a sequence of 12 CRC bits, a sequence of 10 CRC bits, a sequence of eight CRC bits, or a sequence of six CRC bits.

10 . The apparatus of claim 8 , wherein the at least one processor is further configured to determine the first sequence of CRC bits from two jointly encoded symbols of the at least two symbols.

11 . The apparatus of claim 7 , wherein the at least one processor is further configured to determine the first sequence of CRC bits from a singly encoded symbol of the at least two symbols.

12 . The apparatus of claim 7 , wherein the at least one processor is further configured to determine a mask for the first sequence of CRC bits.

13 . A method for wireless communication, comprising:
decoding, by a computing device comprising one or more processors coupled to one or more memory devices, a preamble of a digital communication packet the decoding comprising decoding a field having at least two symbols; determining, by the computing device, a sequence of content bits based at least on decoding the field; determining, by the computing device, a first sequence of cyclic redundancy check (CRC) bits based at least on decoding the field; determining, by the computing device, a second sequence of CRC bits based at least on a portion of the sequence of content bits; comparing, by the computing device, the first sequence of CRC bits and the second sequence of CRC bits; determining, by the computing device, that the first sequence of CRC bits and the second sequence of CRC bits match; and processing, by the computing device, the digital communication packet according to a predetermined radio technology protocol.

14 . The method of claim 13 , further comprising determining, by the computing device, that the first sequence of CRC bits and the second sequence of CRC bits are a mismatch; and processing, by the computing device, the digital communication packet according to a second predetermined radio technology protocol.

15 . The method of claim 13 , wherein determining the first sequence of CRC bits comprises determining, by the computing device, a sequence of 12 bits, a sequence of 10 bits, a sequence of eight bits, or a sequence of six bits.

16 . The method of claim 13 , wherein determining the first sequence of CRC bits comprises determining, by the computing device, two sequences of CRC bits received after the sequence of content bits is received.

17 . The method of claim 13 , wherein determining the first sequence of CRC bits comprises determining, by the computing device, the first sequence of CRC bits from two jointly encoded symbols of the at least two symbols.

18 . The method of claim 13 , wherein determining the first sequence of CRC bits comprises determining, by the computing device, the first sequence of CRC bits from a singly encoded symbol of the at least two symbols.

19 . The method of claim 13 , further comprising unmasking, by the computing device, a fourth sequence of bits obtained from decoding the field prior to determining the second sequence of bits.

20 . A method for wireless communication, comprising:
encoding, by a computing device comprising one or more processors coupled to one or more memory devices, a digital communication packet, the encoding comprising:
encoding, by the computing device, a first legacy field;
encoding, by the computing device, a second legacy field;
encoding, by the computing device, a third legacy field; and
encoding, by the computing device, a non-legacy field having at least two symbols, the non-legacy field including a sequence of content bits and a sequence of cyclic redundancy check (CRC) bits.

21 . The method of claim 20 , wherein encoding the non-legacy field comprises jointly encoding, by the computing device, two symbols of the at least two symbols, the jointly encoded two symbols including the sequence of content bits, the sequence of CRC bits, and a sequence of tail bits.

22 . The method of claim 20 , wherein encoding the non-legacy field comprises jointly encoding, by the computing devi

Assignees

• Li Qinghua
• Chen Xiaogang
• Zhu Yuan
• Stacey Robert
• Yang Rongzhen
• Li Honggang

Inventors

• Li Qinghua
• Chen Xiaogang
• Zhu Yuan
• Stacey Robert
• Yang Rongzhen
• Li Honggang

Classifications

• G06F11/1004

  to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title

• H03M13/23

  using convolutional codes, e.g. unit memory codes · CPC title

• H03M13/413

  tail biting Viterbi decoding · CPC title

• H04L1/0061 Primary

  Error detection codes · CPC title

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title