Chip electronic component and board having the same

US2016111194A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016111194-A1
Application numberUS-201514677826-A
CountryUS
Kind codeA1
Filing dateApr 2, 2015
Priority dateOct 16, 2014
Publication dateApr 21, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

There is provided a chip electronic component including: an insulating substrate; a first internal coil part which is disposed on one surface of the insulating substrate; a second internal coil part which is disposed on the other surface of the insulating substrate opposing one surface of the insulating substrate; a via penetrating through the insulating substrate and connecting the first and second internal coil parts to each other; and first and second via pads disposed on one surface and the other surface of the insulating substrate, respectively, so as to cover the via, wherein when a width of each of a coil pattern of the first and second coil parts is a and a maximum width of each of the first and second via pads is b, 1≦b/a<2.3 is satisfied.

First claim

Opening claim text (preview).

What is claimed is: 1 . A chip electronic component comprising: an insulating substrate; a first internal coil part which is disposed on one surface of the insulating substrate; a second internal coil part which is disposed on the other surface of the insulating substrate opposing one surface of the insulating substrate; a via penetrating through the insulating substrate and connecting the first and second internal coil parts to each other; and first and second via pads disposed on one surface and the other surface of the insulating substrate, respectively, so as to cover the via, wherein when a width of each of a coil pattern of the first and second coil parts is a and a maximum width of each of the first and second via pads is b, 1≦b/a<2.3 is satisfied. 2 . The chip electronic component of claim 1 , wherein when a thickness of each of a coil pattern of the first and second coil parts is c and a thickness of each of the first and second via pads is d, d/c is 1 or less. 3 . The chip electronic component of claim 1 , wherein the first via pad is extended from one end portion of the first internal coil part, and the second via pad is extended from one end portion of the second internal coil part. 4 . The chip electronic component of claim 1 , wherein the first and second internal coil parts and the first and second via pads are formed using a plating process. 5 . The chip electronic component of claim 1 , wherein the width of each of a coil pattern of the first and second coil parts is 30 μm to 200 μm. 6 . The chip electronic component of claim 1 , wherein the maximum width of each of the first and second via pads is 60 μm to 250 μm. 7 . The chip electronic component of claim 1 , further comprising a magnetic body enclosing the first and second internal coil parts, wherein the magnetic body contains a magnetic metal powder. 8 . The chip electronic component of claim 1 , wherein the insulating substrate has a through-hole disposed in a central portion thereof, the through-hole being filled with a magnetic material to form a core part. 9 . The chip electronic component of claim 7 , wherein the other end portions of the first and second internal coil parts are extended to form lead portions exposed to at least one surface of the magnetic body. 10 . A chip electronic component comprising: an insulating substrate; a first internal coil part which is disposed on one surface of the insulating substrate; a second internal coil part which is disposed on the other surface of the insulating substrate opposing one surface of the insulating substrate; a via penetrating through the insulating substrate and connecting the first and second internal coil parts to each other; and first and second via pads disposed on one surface and the other surface of the insulating substrate, respectively, so as to cover the via, wherein when a thickness of each of a coil pattern of the first and second coil parts is c and a thickness of each of the first and second via pads is d, d/c is 1 or less. 11 . The chip electronic component of claim 10 , wherein when a width of each of a coil pattern of the first and second coil parts is a and a maximum width of each of the first and second via pads is b, 1≦b/a<2.3 is satisfied. 12 . The chip electronic component of claim 10 , wherein the first and second internal coil parts and the first and second via pads are formed using a plating process. 13 . The chip electronic component of claim 10 , wherein the width of each of a coil pattern of the first and second coil parts is 30 μm to 200 μm. 14 . The chip electronic component of claim 10 , wherein the maximum width of each of the first and second via pads is 60 μm to 250 μm. 15 . A board having a chip electronic component, the board comprising: a printed circuit board on which first and second electrode pads are disposed; and the chip electronic component of claim 1 mounted on the printed circuit board. 16 . The board of claim 15 , wherein the first and second internal coil parts are disposed to be parallel to a mounting surface of the printed circuit board. 17 . The board of claim 15 , wherein the first and second internal coil parts are disposed to be perpendicular to a mounting surface of the printed circuit board.

Assignees

Inventors

Classifications

  • with stacked layers · CPC title

  • with core substantially closed in itself, e.g. toroid · CPC title

  • with encapsulating core, e.g. made of resin and magnetic powder · CPC title

  • Surface mounted devices · CPC title

  • on stacked layers · CPC title

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Frequently asked questions

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What does patent US2016111194A1 cover?
There is provided a chip electronic component including: an insulating substrate; a first internal coil part which is disposed on one surface of the insulating substrate; a second internal coil part which is disposed on the other surface of the insulating substrate opposing one surface of the insulating substrate; a via penetrating through the insulating substrate and connecting the first and s…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01F17/0013. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).