Device and method for processing counter data

Patent metadata

Field	Value
Publication number	US-2016110199-A1
Application number	US-201514713616-A
Country	US
Kind code	A1
Filing date	May 15, 2015
Priority date	Oct 21, 2014
Publication date	Apr 21, 2016
Grant date	—

Abstract

Provided are a device and a method of processing counter data, the method including receiving pieces of state data and counter data which is a transition condition between the pieces of state data, the pieces of state data and the counter data being expressed as a state machine, determining whether or not the counter data is generated based on the state machine, storing state data, which is transitioned from the counter data in response to the generation of the counter data, and outputting the stored state data.

First claim

What is claimed is:

1 . A method of processing counter data, the method comprising:
receiving pieces of state data and the counter data, which is a transition condition between the pieces of state data, the pieces of state data and the counter data being expressed as a state machine; determining whether or not the counter data is generated based on the state machine; storing state data, which is transitioned from the counter data, in response to the generation of the counter data; and outputting the stored state data.

2 . The method of claim 1 , further comprising:
determining whether or not first counter data, which is a condition for transitioning from a first state data, is generated among the counter data, based on the first state data from among the pieces of state data; storing second state data, which is transitioned from the first state data, in response to the generation of the first counter data; and outputting the stored second state data.

3 . The method of claim 2 , further comprising: in response to the second state data being stored because of the generation of the first counter data,
determining whether or not second counter data, which is a condition for transitioning from the second state data, is generated among the counter data, based on the second state data; storing third state data, which is transitioned from the second counter data, in response to the generation of the second counter data; and outputting the stored second state data and the third state data.

4 . The method of claim 1 , wherein the storing of the state data further comprises storing information on a time point when the state data transitioned by the generation of the counter data, and when the stored data is output, the information on the time point is output.

5 . The method of claim 1 further comprising transforming the state machine by determining a predetermined number of state data from among the pieces of state data, as macro state data.

6 . The method of claim 5 , further comprising:
storing state data transitioned by the generation of counter data in the transformed state machine based on the transformed state machine; and transforming the macro state data into the predetermined number of state data in response to the macro state data being included in the stored state data.

7 . The method of claim 1 , further comprising:
transforming the state machine into a first state machine by determining a predetermined number of state data from among the pieces of state data, as first macro state data; storing state data transitioned by the generation of counter data in the first state machine based on the first state machine; transforming the state machine into a second state machine by determining another predetermined number of state data from among the pieces of state data, as second macro state data; storing state data transitioned by the generation of counter data in the second state machine based on the second state machine; transforming the first macro state data or the second macro state data into the predetermined number of state data or the another predetermined number of state data in response to the first macro state data or the second macro state data being included in the state data stored based on the first state machine and the state data stored based on the second state machine; and outputting the transformed state data.

8 . The method of claim 1 , wherein in the storing of the state data, the transitioned state data is stored in order of transition by the generation of the counter data.

9 . The method of claim 1 , wherein the pieces of state data and the counter data that is a transition condition between the pieces of state data, expressed as the state machine, are determined by a user's setting.

10 . A device for processing counter data, the device comprising:
a state information receiver configured to receive pieces of state data and the counter data, which is a transition condition between the pieces of state data, the pieces of state data and the counter data being expressed as a state machine; a processor, based on the state machine, configured to determine whether or not the counter data is generated; a state buffer, when the counter data is generated, configured to store state data transitioned by the generation of the counter data; and an output unit configured to output the stored state data.

11 . The device of claim 10 , wherein the processor is further configured to determine whether or not first counter data, which is a condition for transitioning from the first state data, is generated among the counter data based on first state data from among the pieces of state data, and
the state buffer is further configured to store second state data, which is transitioned from the first state data by the generation of the first counter data, in response to the generation of the first counter data, and the output unit is configured to output the stored second state data.

12 . The device of claim 11 , wherein the processor is further configured to determine, based on the second state data, whether or not second counter data, which is a condition for transitioning from the second state data, is generated among the counter data in response to storing the second state data because of the generation of the first counter data, and
the state buffer is further configured to store third state data, which is transitioned from the second counter data by the generation of the second counter data, in response to the generation of the second counter data, and the output unit is further configured to output the stored second state data and the third state data.

13 . The device of claim 10 , wherein the state buffer is further configured to store information on a time point when the state data transitioned by the generation of the counter data, and the output unit outputs the stored information on the time point.

14 . The device of claim 10 further comprising a macro state processor configured to transform the state machine by determining a predetermined number of state data from among the pieces of state data, as macro state data.

15 . The device of claim 14 , wherein the state buffer is further configured to store, based on the transformed state machine, state data transitioned by the generation of counter data in the transformed state machine, and
the macro state processor is further configured to transform the macro state data into the predetermined number of state data in response to the macro state data being included in the stored state data.

16 . The device of claim 14 , wherein the macro state processor is further configured to transform the state machine into a first state machine by determining a predetermined number of state data from among the pieces of state data, as first macro state data, and to transform the state machine into a second state machine by determining another predetermined number of state data from among the pieces of state data, as a second macro state data, and
the state buffer is further configured to store state data transitioned by the generation of counter data in the first state machine based on the first state machine, and the state buffer is further configured to store state data transitioned by the generation of counter data in the second state machine based on the second state machine, and the macro state processor is further configured to transform the first macro state data or the second macro state data into the predetermined number of state data or the another predetermined number of state data

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Junkyoung
• Ryu Soojung

Classifications

• G06F9/4498 Primary

  Finite state machines · CPC title

• G06F9/321 Primary

  Program or instruction counter, e.g. incrementing · CPC title

• G06F9/3863

  using multiple copies of the architectural state, e.g. shadow registers · CPC title

• G06F9/444

  Physics · mapped topic

• G06F9/3844

  using dynamic branch prediction, e.g. using branch history tables · CPC title