Method for Producing a Printed Circuit, Printed Circuit Obtained by This Method and Electronic Module Comprising Such a Printed Circuit

US2016105961A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016105961-A1
Application numberUS-201414894558-A
CountryUS
Kind codeA1
Filing dateMay 27, 2014
Priority dateMay 30, 2013
Publication dateApr 14, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The invention concerns a method for producing a printed circuit for a chip card module. This method involves producing two layers of electrically conductive material insulated from each other by a layer of insulating material, connection holes extending through the layer of insulating material and blocked by one of the layers of electrically conductive material, an area free of conductive material being provided in the other layer of electrically conductive material around the connection holes. The invention also concerns a printed circuit for a chip card produced using this method and a chip card module including such a printed circuit.

First claim

Opening claim text (preview).

1 . A method for fabricating a printed circuit for smart card electronic module comprising the production of a composite comprising a first and a second layers of electrically conductive material, attached to an insulating substrate and furthermore comprising at least one bonding hole extending in the insulating substrate between a bottom at least partially closed by the first layer of conductive material and an opening into one side of the insulating substrate, and the production by photolithography and etching of patterns on the second layer of electrically conductive material, characterized by the fact that it furthermore comprises an operation of protecting the bonding hole with a soluble material during a step distinct from the production of patterns on the second layer of electrically conductive material and by the fact that the production of patterns on the second layer of electrically conductive material leaves an area of at least ten microns around the bonding hole devoid of the electrically conductive material of the second layer of electrically conductive material. 2 . The method as claimed in claim 1 , in which the operation of protecting the bonding hole is carried out after the production of patterns on the second layer of electrically conductive material. 3 . The method as claimed in claim 1 , in which the bonding hole is produced by perforation of the insulating substrate after the production of patterns on the second layer of electrically conductive material. 4 . The method as claimed in claim 1 , in which the bonding hole is produced by perforation of the insulating substrate before the production of patterns on the second layer of electrically conductive material. 5 . The method as claimed in claim 3 , in which the first layer of electrically conductive material is laminated on the insulating substrate after the production of the bonding hole by perforation of the insulating substrate. 6 . The method as claimed in claim 5 , in which patterns are produced by photolithography on the first layer of electrically conductive material after lamination of the first layer of electrically conductive material on the insulating substrate and therefore after perforation of the bonding hole. 7 . The method as claimed in claim 1 , in which the operation of protecting the bonding hole is carried out before the production of patterns on the second layer of electrically conductive material. 8 . The method as claimed in claim 1 , in which patterns are produced in the course of the same steps on the first and the second layers of electrically conductive material. 9 . The method as claimed in claim 1 , in which the soluble material is a resin. 10 . The method as claimed in claim 9 , in which a micro-development step precedes the production of the patterns on the first and the second layers of electrically conductive material. 11 . A printed circuit for an electronic module of a smart card including a composite with a first and a second layers of electrically conductive material, attached to an insulating substrate, at least one bonding hole extending in the insulating substrate between a bottom at least partially closed by the first layer of conductive material and an opening into one side of the insulating substrate, and etched patterns in the second layer of electrically conductive material, characterized by the fact that it includes an area of at least ten microns around the bonding hole devoid of the electrically conductive material of the second layer of electrically conductive material. 12 . An electronic module for a smart card, comprising a flexible printed circuit including a composite with a first and second layers of electrically conductive material, attached to an insulating substrate, at least one bonding hole extending in the insulating substrate between a bottom at least partially closed by the first layer of conductive material and an opening into one side of the insulating substrate, and etched patterns in the second layer of electrically conductive material, characterized by the fact that it includes an area of at least ten microns around the bonding hole devoid of the electrically conductive material of the second layer of electrically conductive material.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • changes in dispositions · CPC title

  • the auxiliary member being temporary, e.g. a sacrificial coating · CPC title

  • Dispositions of multiple bond wires · CPC title

  • of bond wires · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016105961A1 cover?
The invention concerns a method for producing a printed circuit for a chip card module. This method involves producing two layers of electrically conductive material insulated from each other by a layer of insulating material, connection holes extending through the layer of insulating material and blocked by one of the layers of electrically conductive material, an area free of conductive mater…
Who is the assignee on this patent?
Linxens Holding
What technology area does this patent fall under?
Primary CPC classification H10W70/699. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).