Pinned photodiode with a low dark current

Patent metadata

Field	Value
Publication number	US-2016104729-A1
Application number	US-201514840680-A
Country	US
Kind code	A1
Filing date	Aug 31, 2015
Priority date	Oct 10, 2014
Publication date	Apr 14, 2016
Grant date	—

Abstract

A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.

First claim

What is claimed is:

1 . A method comprising:
manufacturing a pinned photodiode, the manufacturing including: forming a conversion region of a first conductivity type on a substrate of a second conductivity type, the conversion region being configured to convert photons into electric charges; forming a shallow semiconductor region of the second conductivity type on the conversion region; coating said shallow semiconductor region with a heavily-doped insulator layer of that is doped with dopants of the second conductivity type, the shallow semiconductor region being positioned between the conversion region and the heavily-doped insulation layer; and providing a dopant diffusion from the heavily-doped insulator layer into the shallow semiconductor region.

2 . The method of claim 1 , wherein the conversion region is of type N and the layer of a heavily-doped insulator is a boron-doped silicon oxide layer.

3 . The method of claim 2 , wherein the boron-doped silicon oxide layer is doped with a boron concentration from 5×10 21 to 2×10 22 at./cm 3 .

4 . The method of claim 1 , wherein providing the dopant diffusion includes diffusing dopants from the heavily-doped insulator layer into the shallow semiconductor region to a penetration depth smaller than 50 nm.

5 . The method of claim 4 , wherein the penetration depth is smaller than 10 nm.

6 . The method of claim 1 , wherein forming the shallow semiconductor region includes coating the conversion region with the shallow semiconductor region with a maximum doping level in a range from 10 17 to 10 18 at./cm 3 before coating the shallow semiconductor region with the heavily-doped insulator layer.

7 . The method of claim 1 , wherein providing the dopant diffusion includes annealing the heavily-doped insulator layer and forming a heavily-doped diffusion layer of the second conductivity type having a doping level that is greater than a doping level of the shallow semiconductor region.

8 . A pinned photodiode, comprising:
a conversion region of a first conductivity type formed on a substrate of a second conductivity type, the conversion region being configured to convert photons into electric charges; a diffusion layer of the second conductivity type formed on the conversion region; a shallow semiconductor region of the second conductivity type positioned between the diffusion layer and the conversion region; and a heavily-doped insulator layer that coats the diffusion layer, the heavily-doped insulator layer being of the second conductivity type.

9 . The pinned photodiode of claim 8 , wherein the heavily-doped insulator layer is boron-doped silicon oxide at a boron concentration from 5×10 21 to 2×10 22 at./cm 3 .

10 . The pinned photodiode of claim 8 , wherein the diffusion layer has a depth of less than 50 nm.

11 . The pinned photodiode of claim 8 , wherein the shallow semiconductor region has a maximum doping on the order 10 18 at./cm 3 and the diffusion layer has a maximum doping on the order 10 20 at./cm 3 .

12 . A device, comprising:
a transfer transistor; and a pinned photodiode, the pinned photodiode including:
a conversion region of a first conductivity type formed on a substrate of a second conductivity type, the conversion region being configured to convert photons into electric charges;
a diffusion layer of the second conductivity type formed on the conversion region;
a shallow semiconductor region of the second conductivity type positioned between the diffusion layer and the conversion region; and
a heavily-doped insulator layer that coats the diffusion layer, the heavily-doped insulator layer being of the second conductivity type.

13 . The device of claim 12 , wherein the heavily-doped insulator layer is boron-doped silicon oxide at a boron concentration from 5×10 21 to 2×10 22 at./cm 3 .

14 . The device of claim 12 , wherein the diffusion layer has a depth of less than 10 nm.

15 . The device of claim 14 , wherein the shallow semiconductor region has a maximum doping on the order 10 18 at./cm 3 and the diffusion layer has a maximum doping on the order 10 20 at./cm 3 .

16 . The device of claim 12 , wherein the transfer transistor includes an insulated gate, a drain, and a source, the source being at least a portion of the conversion region.

Assignees

• St Microelectronics Sa
• St Microelectronics Crolles 2

Inventors

• Favennec Laurent
• Dutartre Didier
• Roy Francois

Classifications

• H10F71/121

  The active layers comprising only Group IV materials · CPC title

• H10F39/8037

  the integrated elements comprising a transistor · CPC title

• H10F39/8033

  Photosensitive area · CPC title

• H10F39/807

  Pixel isolation structures · CPC title

• H10F39/024

  of coatings or optical elements · CPC title