Narrow bezel flat panel display

US2016104441A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016104441-A1
Application numberUS-201514864611-A
CountryUS
Kind codeA1
Filing dateSep 24, 2015
Priority dateOct 14, 2014
Publication dateApr 14, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A flat panel display includes a display panel comprising a display area and a non-display area which is disposed on a outside of the display area and has at least one recess on one end side thereof; a driving substrate disposed on a rear surface of the display panel; and at least one connection member connected to the display panel and the driving substrate through at least one recess.

First claim

Opening claim text (preview).

What is claimed is: 1 . A flat panel display comprising: a display panel comprising a display area and a non-display area which is disposed on an outside of the display area and has at least one recess on one end side thereof; a driving substrate disposed on a rear surface of the display panel; and at least one connection member connected to the display panel and the driving substrate through the at least one recess. 2 . The flat panel display of claim 1 , wherein the display panel comprises: a lower substrate comprising the display area having a thin film transistor (TFS) and the non-display area having the at least one recess; and an upper substrate disposed to correspond to the display area of the lower substrate. 3 . The flat panel display of claim 1 , wherein the at least one recess is formed by removing a predetermined area from the one end side of the non-display area of the display panel. 4 . The flat panel display of claim 1 , wherein the at least one recess comprises a horizontal side being spaced apart in parallel from the one end side of the non-display area, and at least one connection member is disposed between the one end side of the non-display area and the horizontal side. 5 . The flat panel display of claim 1 , wherein the at least one connection member passes through the at least one recess. 6 . The flat panel display of claim 1 , wherein the at least one connection member includes two or more connection members, and wherein the two or more connection members pass through the at least one recess.

Assignees

Inventors

Classifications

  • Display panel composed of stacked panels · CPC title

  • G09G3/3622Primary

    using a passive matrix (G09G3/3674 - G09G3/3696 take precedence) · CPC title

  • Conductors connecting driver circuitry and terminals of panels · CPC title

  • characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title

  • Details of electrical connections of light sources to drivers, circuit boards, or the like · CPC title

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Frequently asked questions

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What does patent US2016104441A1 cover?
A flat panel display includes a display panel comprising a display area and a non-display area which is disposed on a outside of the display area and has at least one recess on one end side thereof; a driving substrate disposed on a rear surface of the display panel; and at least one connection member connected to the display panel and the driving substrate through at least one recess.
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3622. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Apr 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).