Array substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-2016103547-A1
Application number	US-201514618897-A
Country	US
Kind code	A1
Filing date	Feb 10, 2015
Priority date	Oct 10, 2014
Publication date	Apr 14, 2016
Grant date	—

Abstract

An array substrate includes a plurality of data lines; a plurality of scanning lines intersecting the data lines to define pixel units; a plurality of pixel electrodes within the pixel units; and a plurality of touch electrodes having a grid shape and formed by a plurality of first sub-electrodes and a plurality of second sub-electrodes intersecting each other. Projections of the first sub-electrodes and the second sub-electrodes onto a layer containing the pixel electrodes are respectively located between adjacent pixel electrodes, or the first sub-electrodes and the second sub-electrodes are respectively located between adjacent pixel electrodes. The product of the resistance of the touch electrode and the load capacitance between the touch electrode, the source electrode and the first metal is reduced, which reduces the charging time of the touch driving signal and enables the touch state and the display state to operate in a time division manner.

First claim

What is claimed is:

1 . An array substrate, comprising:
a plurality of data lines; a plurality of scanning lines intersecting the plurality of data lines to define a plurality of pixel units; a plurality of pixel electrodes within the pixel units; and a plurality of touch electrodes, each of the touch electrodes having a grid shape and formed by a plurality of first sub-electrodes and a plurality of second sub-electrodes intersecting the plurality of first sub-electrodes; wherein projections of the first sub-electrodes and the second sub-electrodes onto a layer containing the pixel electrodes are respectively located between adjacent pixel electrodes, or the first sub-electrodes and the second sub-electrodes are respectively located between adjacent pixel electrodes.

2 . The array substrate according to claim 1 , further comprising a common electrode disposed below the pixel electrodes and electrically insulated from the pixel electrodes.

3 . The array substrate according to claim 2 , wherein, if the projections of the first sub-electrodes and the second sub-electrodes onto the layer containing the pixel electrodes are respectively located between adjacent pixel electrodes, the touch electrodes are located between the pixel electrodes and the common electrode, and the touch electrodes are electrically insulated from both the pixel electrodes and the common electrode.

4 . The array substrate according to claim 2 , wherein the touch electrodes have a block shape, and each of the touch electrodes is electrically connected with a touch electrode line.

5 . The array substrate according to claim 2 , further comprising a plurality of display driving circuits disposed at opposite ends of the touch electrodes and located in a frame area, and a plurality of touch driving circuits integrated together with the display driving circuits; wherein the display driving circuits are configured to provide a plurality of display driving signals to the pixel units, and the touch driving circuits are configured to provide a plurality of touch driving signals to the touch electrodes; and
the touch driving circuits are disposed below a layer containing the touch electrodes, and the touch electrodes are each electrically connected with the touch driving circuits through via holes.

6 . The array substrate according to claim 2 , further comprising a plurality of display driving circuits disposed at opposite ends of the touch electrodes and located in a frame area, and a plurality of touch driving lines disposed above the display driving circuits; wherein the display driving circuits are configured to provide display driving signals to the pixel units, and the touch driving lines are electrically connected with the touch electrodes and configured to provide touch driving signals to the touch electrodes.

7 . The array substrate according to claim 1 , wherein the projections of the first sub-electrodes onto the layer containing the data lines overlap with the data lines; and/or
the projections of the second sub-electrodes onto the layer containing the scanning lines overlap with the scanning lines.

8 . The array substrate according to claim 1 , wherein the touch electrode is made of a metal.

9 . The array substrate according to claim 1 , wherein at least one pixel unit is surrounded by a grid unit of the touch electrode.

10 . The array substrate according to claim 9 , wherein two pixel units are surrounded by the grid unit of the touch electrode.

11 . The array substrate according to claim 1 , wherein the touch electrodes have a strip shape.

12 . The array substrate according to claim 1 , wherein the touch electrodes have a block shape, and each touch electrode is electrically connected with a touch electrode line.

13 . The array substrate according to claim 1 , further comprising a plurality of display driving circuits disposed at opposite ends of the touch electrodes and located in a frame area, and a plurality of touch driving circuits integrated together with the display driving circuits; wherein the display driving circuits are configured to provide display driving signals to the pixel units, and the touch driving circuits are configured to provide touch driving signals to the touch electrodes; and
the touch driving circuits are disposed below a layer containing the touch electrodes, and the touch electrodes are each electrically connected with the touch driving circuits through via holes.

14 . The array substrate according to claim 1 , further comprising a plurality of display driving circuits disposed at opposite ends of the touch electrodes and located in a frame area, and a plurality of touch driving lines disposed above the display driving circuits; wherein the display driving circuits are configured to provide a plurality of display driving signals to the pixel units, and the touch driving lines are electrically connected with the touch electrodes and configured to provide a plurality of touch driving signals to the touch electrodes.

15 . A display panel comprising a color filter substrate, an array substrate disposed opposite to the color filter substrate, and a liquid crystal layer between the color filter substrate and the array substrate; wherein the array substrate is the array substrate of claim 1 .

16 . The display panel according to claim 15 , further comprising a plurality of touch sensing electrodes disposed on a side of the color filter substrate facing away from the liquid crystal layer when the touch electrodes are used as touch driving electrodes.

17 . The display panel according to claim 15 , wherein the color filter substrate comprises a plurality of black matrixes shielding an area in which the touch electrodes are located.

18 . The display panel according to claim 15 , wherein a working state of the display panel comprises a display state and a touch state, wherein the display state and the touch state operate in a time division manner.

19 . The display panel according to claim 18 , wherein, in the display state, a common voltage signal is applied to the touch electrodes, and
in the touch state, a touch driving signal is applied to the touch electrodes.

20 . A display device, comprising the display panel of claim 15 .

Assignees

• Shanghai Tianma Micro Elect Co
• Tianma Micro Electronics Co Ltd

Inventors

• Lu Feng
• Huang Zhongshou
• Zhang Xianxiang
• Li Xiaoye
• Liu Gang
• Xu Yingying

Classifications

• G02F1/13338

  Input devices, e.g. touch panels · CPC title

• G06F3/0416 Primary

  Control or interface arrangements specially adapted for digitisers · CPC title

• G06F2203/04112

  Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material · CPC title

• G06F3/044

  by capacitive means · CPC title

• G02F1/134372

  for fringe field switching [FFS] where the common electrode is not patterned · CPC title