Semiconductor device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-2016093719-A1
Application number	US-201514639520-A
Country	US
Kind code	A1
Filing date	Mar 5, 2015
Priority date	Sep 30, 2014
Publication date	Mar 31, 2016
Grant date	—

Abstract

According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region selectively provided on the first semiconductor region; a third semiconductor region selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region. The insulating film has three or more regions between the fourth electrode and the first semiconductor region. Width of each of the regions in a direction crossing a direction from the third electrode toward the second electrode is different.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type selectively provided on the first semiconductor region; a third semiconductor region of the first conductivity type selectively provided on the second semiconductor region; a first electrode provided on the third semiconductor region and the first electrode electrically being connected to the third semiconductor region; a second electrode electrically connected to the first semiconductor region; a third electrode provide via an insulating film on the first semiconductor region, the second semiconductor region, and the third semiconductor region; and a fourth electrode provided on the second electrode side of the third electrode, the fourth electrode being provided via the insulating film on the first semiconductor region, the insulating film having three or more regions between the fourth electrode and the first semiconductor region, width of each of the regions in a direction crossing a direction from the third electrode toward the second electrode being different.

2 . The device according to claim 1 , wherein the fourth electrode is in contact with the third electrode.

3 . The device according to claim 1 , wherein the insulating film is provided between the fourth electrode and the third electrode.

4 . The device according to claim 1 , wherein the width of the fourth electrode is narrower than width of the third electrode.

5 . The device according to claim 1 , wherein the insulating film in contact with the fourth electrode is thinned stepwise in a direction from the second electrode toward the first electrode.

6 . The device according to claim 1 , wherein a distance between the forth electrode and the first semiconductor region is changed stepwise.

7 . The device according to claim 1 , wherein the insulating film in contact with the fourth electrode includes a plurality of materials.

8 . The device according to claim 1 , wherein
in the insulating film provided between the fourth electrode and the first semiconductor region, oxide films and nitride films are alternately arranged from the first semiconductor region side, and distance between one of the oxide films and the first semiconductor region is different from distance between the other of the oxide films and the first semiconductor region in two of the oxide films sandwiching one of the nitride films.

9 . A method for manufacturing a semiconductor device, comprising:
forming a trench in a first semiconductor region of a first conductivity type, the first semiconductor region having a first surface and a second surface, the trench being toward the first surface side from the second surface; forming an insulating film along an inner wall of the trench, the insulating film having four or more regions, film thickness of each of the regions being different; forming a third electrode via the insulating film having the thinnest film thickness in the trench and forming a fourth electrode via the insulating film below the third electrode; selectively forming a second semiconductor region of a second conductivity type on the first semiconductor region; selectively forming a third semiconductor region of the first conductivity type on the second semiconductor region; and forming a first electrode electrically connected to the third semiconductor region on the third semiconductor region, and forming a second electrode electrically connected to the first semiconductor region below the first semiconductor region.

10 . The method according to claim 9 , wherein the forming the insulating film along the inner wall of the trench repeats, after forming a first insulating film on a side surface of the trench and removing part of the second surface side of the first insulating film:
forming a second insulating film on the side surface of the trench from which the first insulating film is removed, and on the first insulating film; and removing part of the second surface side of the second insulating film formed on the side surface of the trench from which the first insulating film is removed, the first insulating film and the second insulating film being redefined as the first insulating film.

11 . The method according to claim 10 , wherein
a mask layer is formed via the first insulating film on the side surface of the trench, and the part of the second surface side of the first insulating film is removed by exposing the first insulating film sandwiched between the side surface of the trench and the mask layer to a solution.

12 . The method according to claim 10 , wherein the part of the second surface side of the first insulating film is selectively doped with an impurity element before removing the part of the second surface side of the first insulating film.

13 . The method according to claim 9 , wherein the forming the insulating film along the inner wall of the trench repeats, after forming a layer along the inner wall of the trench, the layer including first insulating films and second insulating films arranged alternately from the first semiconductor region side, the first insulating film being exposed in the trench:
removing part of the second surface side of the exposed first insulating film in the layer and a second insulating film in contact with the part; and exposing a first insulating film in contact with the second insulating film in contact with the part.

14 . The method according to claim 13 , wherein material of the first insulating film is different from material of the second insulating film.

15 . The method according to claim 13 , wherein the first insulating film includes an oxide, and the second insulating film includes a nitride.

16 . The method according to claim 9 , wherein the forming the insulating film along the inner wall of the trench includes:
forming a first insulating film on the inner wall of the trench; forming a mask layer via the first insulating film on the inner wall of the trench; and performing etch-back a plurality of times on the mask layer, and exposing the first insulating film to an etchant selectively etching the first insulating film after each etch-back.

17 . A method for manufacturing a semiconductor device, comprising:
forming a hole in a first semiconductor region of a first conductivity type, the first semiconductor region having a first surface and a second surface, the hole being toward the first surface side from the second surface; forming an insulating film along an inner wall of the hole, the insulating film having four or more regions, film thickness of each of the regions being different; forming a third electrode via the insulating film having the thinnest film thickness in the hole and forming a fourth electrode via the insulating film below the third electrode; selectively forming a second semiconductor region of a second conductivity type on the first semiconductor region; selectively forming a third semiconductor region of the first conductivity type on the second semiconductor region; and forming a first electrode electrically connected to the third semiconductor region on the third semiconductor region, and forming a second electrode electrically connected to the first semiconductor region below the first semiconductor region.

18 . The method according to claim 17 , wherein the forming the insulating film along the inner wall of the hole repeats, after forming a first insulating film on a side surface of

Assignees

• Toshiba Kk

Inventors

• Kobayashi Kenya
• Nishiguchi Toshifumi

Classifications

• H10D64/013 Primary

  of electrodes having a conductor capacitively coupled to a semiconductor by an insulator · CPC title

• H10D64/516

  the thicknesses being non-uniform · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D30/668

  having trench gate electrodes, e.g. UMOS transistors · CPC title

• H10D30/0297

  using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title