Nonvolatile semiconductor storage device and method of manufacturing the same

US2016079068A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016079068-A1
Application numberUS-201514799195-A
CountryUS
Kind codeA1
Filing dateJul 14, 2015
Priority dateSep 16, 2014
Publication dateMar 17, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A nonvolatile semiconductor storage device includes a stack structure including first insulating films and first electrode films stacked alternately, the stack structure having a first through hole extending therethrough; a second electrode film provided above the stack structure, the second electrode film having a second through hole extending therethrough and communicating with the first through hole; a second insulating film provided above the second electrode film and having a third through hole extending therethrough and communicating with the second through hole; a semiconductor film provided along inner surfaces of the first and the second through holes; a memory film provided between the first electrode film and the semiconductor film; and a gate insulating film provided between the second electrode film and the semiconductor film; the third through hole becoming narrower toward an upper side of the stack direction and wider toward a lower side of a stack direction.

First claim

Opening claim text (preview).

What is claimed is: 1 . A nonvolatile semiconductor storage device comprising: a stack structure including a plurality of first insulating films and a plurality of first electrode films stacked alternately one above another, the stack structure having a first through hole extending therethrough along a stack direction in which the first insulating films and the first electrode films are stacked; a second electrode film provided above the stack structure, the second electrode film having a second through hole extending therethrough in the stack direction and communicating with the first through hole; a second insulating film provided above the second electrode film, the second insulating film having a third through hole extending therethrough in the stack direction and communicating with the second through hole; a semiconductor film provided along an inner surface of the first through hole and the second through hole; a memory film provided between the first electrode film and the semiconductor film; and a gate insulating film provided between the second electrode film and the semiconductor film; the third through hole becoming narrower toward an upper side of the stack direction and wider toward a lower side of the stack direction, and an electrically conductive material connected to the semiconductor film is provided in the third through hole. 2 . The device according to claim 1 , wherein the semiconductor film includes a hollow portion, the hollow portion being filled with an insulating material. 3 . The device according to claim 2 , wherein a position of an upper portion of the semiconductor film and a position of an upper portion of the gate insulating film in the stack direction are higher than a position of an undersurface of the second insulating film in the stack direction. 4 . The device according to claim 1 , wherein the second through hole and the first through hole are shaped so as to become narrower toward a lower side of the stack direction. 5 . The device according to claim 1 , wherein a first cross section of the first through hole, a second cross section of the second through hole, and a third cross section of the third through hole taken along planes orthogonal to the stack direction are circular. 6 . The device according to claim 2 , wherein a position of an upper portion of the insulating material in the stack direction is higher than a position of an upper portion of the semiconductor film in the stack direction and a position of an upper portion of the gate insulating film in the stack direction. 7 . The device according to claim 6 , wherein the first electrode film and the second electrode film each comprises an electrically conductive silicon layer, and the first insulating film and the second insulating film each comprises a tetraethoxysilane layer containing a silicon oxide. 8 . The device according to claim 7 , wherein the semiconductor film serves as a channel film comprising polysilicon. 9 . The device according to claim 8 , wherein the memory film and the gate insulating film each include a stack of an insulative block layer, a charge storing layer, and an insulative tunnel layer. 10 . The device according to claim 9 , wherein the block layer comprises a silicon oxide film, the charge storing layer comprises a silicon nitride film, and the tunnel layer comprises a silicon oxide film. 11 . The device according to claim 10 , wherein the insulating material comprises a silicon oxide film or a silicon nitride film. 12 . The device according to claim 2 , wherein the insulating material is provided with a hollow portion. 13 . A method of manufacturing a nonvolatile semiconductor storage device comprising: forming a stack structure by alternately stacking a plurality of first insulating films and a plurality of first electrode films one above another, forming a second electrode film above the stack structure; forming a second insulating film above the second electrode film; forming a through hole extending through the second insulating film, the second electrode film, and the stack structure in a stack direction in which the first insulating film and the first electrode film are stacked; forming a memory film along an inner surface of the through hole; and forming a semiconductor film along the memory film, the through hole being formed through the second insulating film so that an upper portion thereof becomes narrower toward an upper side of the stack direction and wider toward a lower side of the stack direction. 14 . The method according to claim 13 , further comprising filling the through hole with an electrically conductive material, the electrically conductive material being connected to the semiconductor film. 15 . The method according to claim 14 , wherein a hollow portion is formed in the semiconductor film and the hollow portion is filled with an insulating material. 16 . The method according to claim 15 , wherein forming the through hole through the second insulating film is performed by reactive ion etching. 17 . The method according to claim 16 , wherein forming the memory film along the inner surface of the through hole includes forming a stack of an insulative block layer, a charge storing layer, and a insulative tunnel layer by a chemical vapor deposition. 18 . The method according to claim 17 , wherein forming the semiconductor film along the memory film includes forming polysilicon serving as a channel film by a chemical vapor deposition. 19 . The method according to claim 18 , wherein filling the hollow portion of the semiconductor film with the insulating material includes filling a silicon oxide film or a silicon nitride film by chemical vapor deposition. 20 . The method according to claim 19 , wherein filling the through hole with the electrically conductive material connected to the semiconductor material includes filling a polysilicon film doped with impurities by chemical vapor deposition.

Assignees

Inventors

Classifications

  • Vertical IGFETs having charge trapping gate insulators · CPC title

  • Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) · CPC title

  • of FETs having charge-trapping gate insulators, e.g. MNOS transistors · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US2016079068A1 cover?
A nonvolatile semiconductor storage device includes a stack structure including first insulating films and first electrode films stacked alternately, the stack structure having a first through hole extending therethrough; a second electrode film provided above the stack structure, the second electrode film having a second through hole extending therethrough and communicating with the first thro…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10D30/0413. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).