Circuit and method of correcting a power factor for ac direct lighting apparatus

Patent metadata

Field	Value
Publication number	US-2016065055-A1
Application number	US-201514661716-A
Country	US
Kind code	A1
Filing date	Mar 18, 2015
Priority date	Aug 29, 2014
Publication date	Mar 3, 2016
Grant date	—

Abstract

A circuit for correcting a power factor for an AC direct lighting apparatus that includes a valley signal generating unit configured to receive a full-wave rectified AC input voltage signal and configured to compare an internal reference voltage signal and the AC input voltage signal to generate a valley signal, a reference voltage control unit configured to receive the generated valley signal and count clock cycles of an internal clock to detect a frequency of the AC input voltage signal and configured to determine a frequency of a drive current to control a reference voltage signal based on the determined frequency of the drive current and a reference voltage control clock generating unit configured to generate a pulse width modulation signal associated with a pulse width of the reference voltage signal and configured to generate the reference voltage control clock signal based on the generated pulse width modulation signal and the controlled reference signal. Thus, the circuit may control a phase of a drive current and adjust a variation of the reference voltage signal to improve the power factor of the circuit.

First claim

What is claimed is:

1 . A power factor correcting circuit for an AC direct lighting apparatus, the circuit comprising:
a valley signal generating unit configured to receive a full-wave rectified AC input voltage signal, and configured to compare an internal reference voltage signal and the AC input voltage signal to generate a valley signal; a reference voltage control unit configured to receive the valley signal and count clock cycles of a clock signal to detect a frequency of the AC input voltage signal, and configured to determine a frequency of a drive current to control a reference voltage signal based on the determined frequency of the drive current; and, a reference voltage control clock generating unit configured to generate a pulse width modulation signal associated with a pulse width of the reference voltage signal, and configured to generate a reference voltage control clock signal based on the generated pulse width modulation signal and the controlled reference signal.

2 . The circuit of claim 1 , wherein the reference voltage control unit includes:
a drive current frequency determining module configured to receive the valley signal and count the clock cycles of the clock signal to detect the frequency of the AC input voltage signal, and configured to determine the frequency of the drive current; and, a digital-analog converting module configured to receive a digital value from the drive current frequency determining module to output the reference voltage signal.

3 . The circuit of claim 2 , wherein the drive current frequency determining module determines a slope change interval of the AC input voltage signal based on the determined frequency of the drive current.

4 . The circuit of claim 2 , wherein the digital-analog converting module counts clock cycles of the reference voltage control clock signal up to a specific number to step-up or step-down the reference voltage signal and to cause the reference voltage signal to follow the AC input voltage signal.

5 . The circuit of claim 2 , wherein the reference voltage control unit outputs the reference voltage signal based on the reference voltage control clock signal according to a step to control a phase of the drive current.

6 . The circuit of claim 1 , wherein the reference voltage control clock generating unit includes:
a reference voltage providing module configured to receive the reference voltage; a pulse width modulation signal generating module configured to generate the pulse width modulation signal based on the pulse width of the reference voltage signal; and, a reference voltage control clock generating module configured to compare the received reference voltage signal and the generated pulse width modulation signal to generate the reference voltage control clock signal.

7 . The circuit of claim 6 , wherein the pulse width modulation signal generating module includes:
a charge switching element configured to receive the reference voltage control clock signal, the charge switching element being further configured to turn ON or OFF based on the reference voltage control clock signal; and, a capacitive element configured to be charged when the charge switching element is turned OFF and to be discharged when the charge switching element is turned ON.

8 . The circuit of claim 6 , wherein the reference voltage control clock generating module includes:
a comparing element configured to compare the reference voltage signal and the pulse width modulation signal; and a storage element configured to generate the reference voltage control clock signal based on an output value of the comparing element.

9 . The circuit of claim 8 , wherein the storage element comprises a latch.

10 . The circuit of claim 1 , further comprising:
a drive switching element configured to control flow of the drive current; and, a switch control unit configured to turn ON or turn OFF the drive switching element based on the reference voltage control clock signal.

11 . The circuit of claim 10 , wherein the switch control unit turns ON the drive switching element to supply the drive current to an LED module during a first interval of the reference voltage control clock signal, and turns OFF the drive switching element during a second interval of the reference voltage control clock signal.

12 . The circuit of claim 11 , wherein the drive switching element supplies the drive current to an inductor when the drive switching element is turned ON and flows a current being charged on the inductor into the LED module through a diode when the drive switching element is turned OFF.

Assignees

• Magnachip Semiconductor Ltd

Inventors

• Lim Gyu Ho
• Kim Jin Wook
• Yoon Jong Hyun

Classifications

• H05B45/37

  Converter circuits · CPC title

• H05B45/10

  Controlling the intensity of the light · CPC title

• H05B47/10 Primary

  Controlling the light source · CPC title

• H02M1/4208 Primary

  Arrangements for improving power factor of AC input · CPC title

• H05B45/44

  with an active control inside an LED matrix · CPC title