Semiconductor device for wireless communication

Patent metadata

Field	Value
Publication number	US-2016043712-A1
Application number	US-201514920015-A
Country	US
Kind code	A1
Filing date	Oct 22, 2015
Priority date	Oct 28, 2010
Publication date	Feb 11, 2016
Grant date	—

Abstract

Provided is a semiconductor device for wireless communication which achieves a reduction in leakage power and allows an improvement in power efficiency. For example, to external terminals, an antenna driver section for driving an antenna and a rectifying section for rectifying input power from the antenna are coupled. The antenna driver section includes pull-up PMOS transistors and pull-down NMOS transistors. In the rectifying section, a power supply voltage generated by a full-wave rectifying circuit is boosted by a voltage boosting circuit. For example, when a supply of a power supply voltage from a battery is stopped, a power supply voltage resulting from the boosting by the voltage boosting circuit is supplied to the bulk of each of the pull-up PMOS transistors.

First claim

What is claimed is:

1 . A semiconductor device for wireless communication, comprising:
a first power supply voltage to which an external power supply is supplied; a second power supply voltage; a first terminal for coupling to an antenna; a p-channel first MISFET having a source-drain path coupled between the first terminal and the first power supply voltage to drive the antenna; an n-channel second MISFET having a source-drain path coupled between the first terminal and the second power supply voltage to drive the antenna; and a rectifying circuit section coupled to the first terminal, wherein the rectifying circuit section uses an alternating current signal inputted to the first terminal via the antenna to generate a third power supply voltage having a value higher than that of the first power supply voltage and higher than that of the high-potential voltage occurring at the first terminal when the alternating current signal has a maximum amplitude, and wherein the third power supply voltage is used as a bulk voltage of the first MISFET.

2 . A semiconductor device for wireless communication according to claim 1 ,
wherein the first MISFET includes: a p-type first semiconductor layer; and an n-type second semiconductor layer which is formed in the first semiconductor layer and in which a channel of the first MISFET is formed, wherein the first semiconductor layer is supplied with a voltage level at the same potential as that of the second power supply voltage.

3 . A semiconductor device for wireless communication according to claim 1 ,
wherein the second MISFET includes: a p-type third semiconductor layer; an n-type fourth semiconductor layer formed in the third semiconductor layer; and a p-type fifth semiconductor layer which is formed in the fourth semiconductor layer and in which a channel of the second MISFET is formed, wherein the fourth semiconductor layer is supplied with a voltage level at the same potential as that of the second power supply voltage.

4 . A semiconductor device for wireless communication according to claim 1 , wherein the third power supply voltage is used also as a gate voltage when the first MISFET is driven to be turned OFF.

5 . A semiconductor device for wireless communication according to claim 1 ,
wherein the rectifying circuit section includes: a first rectifying circuit which receives the alternating current signal inputted thereto to perform a rectifying operation via an element having a diode function; a first capacitor coupled between an output node of the first rectifying circuit and a ground power supply voltage; a second capacitor having one terminal to which the alternating current signal is inputted; a second rectifying circuit which receives a signal from the other terminal of the second capacitor inputted thereto to perform a rectifying operation via an element having a diode function; and a third capacitor coupled between an output node of the second rectifying circuit and the output node of the first rectifying circuit, wherein the third power supply voltage is generated from the output node of the second rectifying circuit, and wherein a fourth power supply voltage is generated from the output node of the first rectifying circuit.

6 . A semiconductor device for wireless communication according to claim 5 , further comprising:
a first switch circuit which selectively supplies either the third power supply voltage or the first power supply voltage as the bulk voltage of the first MISFET.

7 . A semiconductor device for wireless communication according to claim 6 , further comprising:
a determining circuit which operates using the power supply voltage generated by the rectifying circuit section to determine a magnitude of the external power supply, wherein the first switch circuit has: a p-channel third MISFET having one of source/drain regions thereof coupled to the first power supply voltage and the other thereof coupled to the bulk voltage of the first MISFET such that an ON/OFF state thereof is controlled depending on a result of the determination by the determining circuit; and a p-channel fourth MISFET having one of source/drain regions thereof coupled to the third power supply voltage and the other thereof coupled to the bulk voltage of the first MISFET such that an ON/OFF state thereof is controlled complementarily to the third MISFET depending on the result of the determination by the determining circuit.

8 . A semiconductor device for wireless communication according to claim 7 ,
wherein the first switch circuit further has: a p-channel fifth MISFET having one of source/drain regions thereof coupled to the first power supply voltage, the other thereof coupled to the bulk voltage of the first MISFET, and a gate electrode thereof coupled to the third power supply voltage; and a p-channel sixth MISFET having one of source/drain regions thereof coupled to the third power supply voltage, the other thereof coupled to the bulk voltage of the first MISFET, and a gate electrode thereof coupled to the first power supply voltage.

9 . A semiconductor device for wireless communication according to claim 5 ,
wherein, as the other of the external power supplies, each of a higher-potential fifth power supply voltage and a lower-potential sixth power supply voltage is further supplied, the semiconductor device for wireless communication further comprising: a second switch circuit which selectively supplies either the fourth power supply voltage or the fifth power supply voltage as an internal power supply voltage.

10 . A semiconductor device for wireless communication according to claim 9 , further comprising:
a regulator circuit which controls a magnitude of the fourth power supply voltage, wherein the regulator circuit has: a seventh MISFET having a source-drain path coupled between the fourth power supply voltage and the ground power supply voltage; and an amplifier circuit which detects the internal power supply voltage coupled to the fourth power supply voltage via the second switch circuit, compares the internal power supply voltage with a preset reference voltage, and drives a gate electrode of the seventh MISFET according to a result of the comparison.

11 . A semiconductor device for wireless communication according to claim 5 , further comprising:
a second terminal which serves as a terminal for receiving a modulation signal inputted from the antenna; a demodulating circuit for demodulating the modulation signal; and a shunt switch for short-circuiting the output nodes of the first and second rectifying circuits to the ground power supply voltage.

12 . A semiconductor device for wireless communication according to claim 1 , further comprising:
a first feedback path provided between the first terminal and a gate electrode of the first MISFET to retard a shift of a gate voltage of the first MISFET using a resistive component and a capacitive component; and a second feedback path provided between the first terminal and a gate electrode of the second MISFET to retard a shift of a gate voltage of the second MISFET using a resistive component and a capacitive component, wherein the first feedback path includes a first coupling switch for controlling conduction/non-conduction between the first terminal and the gate electrode of the first MISFET, and wherein the second feedback path includes a second coupling switch for controlling conduction/non-conduction between the first terminal and the gate electrode of the second MISFET.

13 . A semiconductor device for wireless communication according to claim 1 ,
wherein the first

Assignees

• Renesas Electronics Corp

Inventors

• Okuda Yuichi

Classifications

• H10D84/83

  of only insulated-gate FETs [IGFET] · CPC title

• H10D89/215

  comprising arrangements for charge pumping or biasing substrates · CPC title

• H10D84/859

  comprising both N-type and P-type wells, e.g. twin-tub · CPC title

• H03K17/6877

  the control circuit comprising active elements different from those used in the output circuit · CPC title

• H03K17/063

  in field-effect transistor switches · CPC title