Control apparatus and control method

Patent metadata

Field	Value
Publication number	US-2016018989-A1
Application number	US-201314771951-A
Country	US
Kind code	A1
Filing date	May 31, 2013
Priority date	May 31, 2013
Publication date	Jan 21, 2016
Grant date	—

Abstract

A control apparatus, which is configured to control a plurality of processors corresponding to a plurality of storage areas arranged at an interface for accessing the storage areas, comprises: an update unit configured to, in a case a command sequence including each command outputted to one of the storage areas is inputted, update, by each one of the processors, a load applied by a command currently being executed to the storage area corresponding to the processor; a selection unit configured to, for one command of the command sequence, based on a load applied by a command currently executed at the processor updated by the update unit, select a processor out of the processors as an allocation destination of the one command; and an output unit configured to output the one command to the processor selected by the selection unit.

First claim

What is claimed is:

1 . A control apparatus configured to control a plurality of processors corresponding to a plurality of storage areas arranged at an interface for accessing the storage areas, the apparatus comprising:
an update unit configured to, in a case a command sequence including each command outputted to one of the storage areas is inputted, update, by each one of the processors, a load applied by a command currently being executed to the storage area corresponding to the processor; a selection unit configured to, for one command of the command sequence, based on a load applied by a command currently executed at the processor updated by the update unit, select a processor out of the processors as an allocation destination of the one command; and an output unit configured to output the one command to the processor selected by the selection unit.

2 . The control apparatus according to claim 1 ,
wherein the apparatus includes a determination unit configured to, for a first command of the command sequence and a second command arranged immediately after the first command, determine whether an address for accessing one of the storage areas includes continuity and whether an access type is the same, wherein the selection unit selects, in a case the determination unit determines the address for accessing includes continuity and the access type is the same, the processor corresponding to the storage area accessed by the first command out of the processors, and wherein the output unit outputs the second command to the processor selected by the selection unit and corresponding to the storage area the first command accessed.

3 . The control apparatus according to claim 2 wherein the apparatus selects a processor out of the processors as an allocation destination of the second command based on a load applied by a command currently being executed at each processor updated by the update unit in a case the determination unit determines the address for accessing includes no continuity or in a case the access type is not the same.

4 . The control apparatus according to claim 1 ,
wherein the apparatus includes a storage unit configured to store association information correlating identification information of a specified processor out of the processors with identification information of a specified storage area out of the storage areas being an access destination of the specified processor, wherein the apparatus includes a determination unit configured to, by referring to the association information, determine whether identification information of the storage area being an access destination of the one command retained at the one command matches identification information of the specified storage area, and wherein the selection unit selects the specified processor in a case the determination unit determines the identification information of the storage area being an access destination of the one command matches the identification information of the specified storage area.

5 . The control apparatus according to claim 1 ,
wherein the apparatus includes a storage unit configured to store association information correlating identification information of a specified processor out of the processors with a size of a command outputted by the specified processor to an access destination, wherein the apparatus includes a determination unit configured to, by referring to the association information, determine whether a size of the one command matches the size of a command outputted by the specified processor to an access destination, and wherein the selection unit selects the specified processor in a case the determination unit determines a size of the second command matches a size of a command outputted by the specified processor.

6 . A control method for a control apparatus configured to control a plurality of processors corresponding to a plurality of storage areas arranged at an interface for accessing the storage areas, the method comprising:
updating, in a case a command sequence including each command outputted to one of the storage areas is inputted, by each one of the processors, a load applied by a command currently being executed to the storage area corresponding to the processor; selecting, for one command of the command sequence, based on a load applied by a command currently executed at the processor updated by the updating, a processor out of the processors as an allocation destination of the one command; and outputting the one command to the processor selected by the selecting.

7 . The control method according to claim 6 , comprising:
determining, for a first command of the command sequence and a second command arranged immediately after the first command, whether an address for accessing one of the storage areas includes continuity and whether an access type is the same, wherein, in the selecting, the control apparatus selects the processor corresponding to the storage area accessed by the first command out of the processors, in a case the control apparatus determines the address for accessing includes continuity and the access type is the same in the determinating, and wherein, in the outputting, the control apparatus outputs the second command to the processor selected by the selecting and corresponding to the storage area the first command accessed.

8 . The control method according to claim 7 wherein the control apparatus selects a processor out of the processors as an allocation destination of the second command based on a load applied by a command currently being executed at each processor updated by the updating in a case the control apparatus determines the address for accessing includes no continuity or in a case the access type is not the same.

9 . The control method according to claim 6 ,
wherein the apparatus includes a storage unit configured to store association information correlating identification information of a specified processor out of the processors with identification information of a specified storage area out of the storage areas being an access destination of the specified processor, and the method comprising: determining, by referring to the association information, whether identification information of the storage area being an access destination of the one command retained at the one command matches identification information of the specified storage area, and wherein, in the selecting, the control apparatus selects the specified processor in a case the determination process determines the identification information of the storage area being an access destination of the one command matches the identification information of the specified storage area.

10 . The control method according to claim 6 ,
wherein the apparatus includes a storage unit configured to store association information correlating identification information of a specified processor out of the plurality of processors with a size of a command outputted by the specified processor to an access destination, and the method comprising: determining, by referring to the association information, whether a size of the one command matches the size of a command outputted by the specified processor to an access destination, and wherein, in the selecting, the control apparatus selects the specified processor in a case the control apparatus determines a size of the second command matches a size of a command outputted by the specified processor.

Assignees

• Hitachi Ltd

Inventors

• Kiyota Yusaku
• Gotou Tetsuhiro
• Toyohara Yoshihiro

Classifications

• G06F3/061 Primary

  Improving I/O performance · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0673

  Single storage device · CPC title

• G06F13/10

  Program control for peripheral devices (G06F13/14 - G06F13/42 take precedence) · CPC title

• G06F3/0689

  Disk arrays, e.g. RAID, JBOD · CPC title