Touch panel substrate, electronic device, and production method for electronic device

US2016018929A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016018929-A1
Application numberUS-201314442664-A
CountryUS
Kind codeA1
Filing dateNov 14, 2013
Priority dateNov 14, 2012
Publication dateJan 21, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention provides a touch panel substrate that allows for greater design freedom when designing conductive wire patterns for reducing occurrence of the moiré effect. The touch panel substrate includes: a first electrode layer that includes first conductive wires and second conductive wires; and a second electrode layer that includes third conductive wires and fourth conductive wires. When viewed in a plan view, the first conductive wires and the third conductive wires form first quadrilaterals, and the second conductive wires and the fourth conductive wire form second quadrilaterals. The first quadrilaterals and the second quadrilaterals are not identical to one another.

First claim

Opening claim text (preview).

1 . A touch panel substrate, comprising: a first electrode layer and a second electrode layer, wherein the first electrode layer includes a plurality of mutually parallel first conductive wires and a plurality of mutually parallel second conductive wires that intersect with the first conductive wires, wherein the second electrode layer includes a plurality of mutually parallel third conductive wires and a plurality of mutually parallel fourth conductive wires that intersect with the third conductive wires, wherein an angle between the first conductive wires and the second conductive wires is not equal to 90°, and the first conductive wires and second conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein an angle between the third conductive wires and the fourth conductive wires is not equal to 90°, and the third conductive wires and fourth conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein the first electrode layer and the second electrode layer being overlaid in a plan view causes the adjacent first conductive wires and adjacent third conductive wires to define a plurality of first quadrilaterals, and the adjacent second conductive wires and adjacent fourth conductive wires to define a plurality of second quadrilaterals, and wherein the first quadrilaterals and the second quadrilaterals are not identical. 2 . The touch panel substrate according to claim 1 , wherein the first quadrilaterals and the second quadrilaterals are square-shaped. 3 . The touch panel substrate according to claim 1 , wherein the first electrode layer includes a plurality of first sensor electrodes that are insulated from one another, and the second electrode layer includes a plurality of second sensor electrodes that are insulated from one another, wherein the first sensor electrodes are formed by severing the first conductive wires and the second conductive wires to divide a conductive wire pattern formed by the first conductive wires and the second conductive wires into a plurality of regions, and wherein the second sensor electrodes are formed by severing the third conductive wires and the fourth conductive wires to divide a conductive wire pattern formed by the third conductive wires and the fourth conductive wires into a plurality of regions. 4 . An electronic device, comprising: the touch panel substrate according to claim 1 ; and a display device, wherein a display surface of the display device includes a plurality of pixels arranged in a matrix pattern, and wherein a diagonal length of the first quadrilaterals and a diagonal length of the second quadrilaterals are no more than four times a gap between adjacent pixels. 5 . A method of manufacturing an electronic device, comprising: forming a first electrode layer; and forming a second electrode layer over the first electrode layer, wherein the first electrode layer includes a plurality of mutually parallel first conductive wires and a plurality of mutually parallel second conductive wires that intersect with the first conductive wires, wherein the second electrode layer includes a plurality of mutually parallel third conductive wires and a plurality of mutually parallel fourth conductive wires that intersect with the third conductive wires, wherein an angle between the first conductive wires and the second conductive wires is not equal to 90°, and the first conductive wires and second conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein an angle between the third conductive wires and the fourth conductive wires is not equal to 90°, and the third conductive wires and fourth conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein the first electrode layer and the second electrode layer being overlaid in a plan view causes the adjacent first conductive wires and adjacent third conductive wires to define a plurality of first quadrilaterals, and the adjacent second conductive wires and adjacent fourth conductive wires to define a plurality of second quadrilaterals, and wherein the first quadrilaterals and the second quadrilaterals are not identical. 6 . The touch panel substrate according to claim 2 , wherein the first electrode layer includes a plurality of first sensor electrodes that are insulated from one another, and the second electrode layer includes a plurality of second sensor electrodes that are insulated from one another, wherein the first sensor electrodes are formed by severing the first conductive wires and the second conductive wires to divide a conductive wire pattern formed by the first conductive wires and the second conductive wires into a plurality of regions, and wherein the second sensor electrodes are formed by severing the third conductive wires and the fourth conductive wires to divide a conductive wire pattern formed by the third conductive wires and the fourth conductive wires into a plurality of regions. 7 . An electronic device, comprising: the touch panel substrate according to claim 2 ; and a display device, wherein a display surface of the display device includes a plurality of pixels arranged in a matrix pattern, and wherein a diagonal length of the first quadrilaterals and a diagonal length of the second quadrilaterals are no more than four times a gap between adjacent pixels. 8 . An electronic device, comprising: the touch panel substrate according to claim 3 ; and a display device, wherein a display surface of the display device includes a plurality of pixels arranged in a matrix pattern, and wherein a diagonal length of the first quadrilaterals and a diagonal length of the second quadrilaterals are no more than four times a gap between adjacent pixels. 9 . An electronic device, comprising: the touch panel substrate according to claim 6 ; and a display device, wherein a display surface of the display device includes a plurality of pixels arranged in a matrix pattern, and wherein a diagonal length of the first quadrilaterals and a diagonal length of the second quadrilaterals are no more than four times a gap between adjacent pixels.

Assignees

Inventors

Classifications

  • by capacitive means · CPC title

  • G06F3/047Primary

    using sets of wires, e.g. crossed wires · CPC title

  • Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • G06F3/0446Primary

    using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

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What does patent US2016018929A1 cover?
The present invention provides a touch panel substrate that allows for greater design freedom when designing conductive wire patterns for reducing occurrence of the moiré effect. The touch panel substrate includes: a first electrode layer that includes first conductive wires and second conductive wires; and a second electrode layer that includes third conductive wires and fourth conductive wire…
Who is the assignee on this patent?
Sharp Kk
What technology area does this patent fall under?
Primary CPC classification G06F3/047. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jan 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).