Dynamic power allocations for direct broadcasting satellite (dbs) channels via wavefront multiplexing

Patent metadata

Field	Value
Publication number	US-2016014786-A1
Application number	US-201514859417-A
Country	US
Kind code	A1
Filing date	Sep 21, 2015
Priority date	Jul 30, 2009
Publication date	Jan 14, 2016
Grant date	—

Abstract

A direct broadcasting satellite (DBS) system features a capability of coherently combining amplified signals powers from various broadcasting transponders without modifying the satellite segment. Organized DBS transponders would function as an equivalent DBS transponder with a higher EIRP. Power allocations are via a mechanism in an uplink transmitter in a ground segment and power combining mechanisms are in user receivers in a user segment. Specifically, the transmitter generates mixtures of input signals by using Wavefront-Multiplexing and transmits wavefront-multiplexed (WFM) signals which are sent concurrently through multiple parallel channels of transponders in the satellite segment. A receiver in the user segment separates the mixtures of received amplified WFM signals and coherently combines amplified components by various transponders by adaptive equalizing and Wavefront De-Multiplexing processors. The WFM signal mixtures allow an operator, or automated system, at the transmitter to dynamically allocate the equivalent transponder powers according to continuously changing demands.

First claim

What is claimed is:

1 . A data processing system comprising:
a first processor having a first input port configured to receive a first signal, a second input port configured to receive a second signal, a first output port configured to generate a first output containing information associated with a first combination of said first and second signals and a second output port configured to generate a second output containing information associated with a second combination of said first and second signals.

2 . The data processing system of claim 1 , wherein said first processor further has a third input port configured to receive a third signal, wherein said first output contains information associated with said first combination of said first, second and third signals and said second output contains information associated with said second combination of said first, second and third signals.

3 . The data processing system of claim 1 , wherein said first processor further has a third input port configured to receive a third signal and a fourth input port configured to receive a fourth signal, wherein said first output contains information associated with said first combination of said first, second, third and fourth signals and said second output contains information associated with said second combination of said first, second, third and fourth signals.

4 . The data processing system of claim 1 , wherein said first processor further has a third output port configured to generate a third output containing information associated with a third combination of said first and second signals.

5 . The data processing system of claim 1 , wherein said first processor further has a third output port configured to generate a third output containing information associated with a third combination of said first and second signals and a fourth output port configured to generate a fourth output containing information associated with a fourth combination of said first and second signals.

6 . The data processing system of claim 1 , wherein said first processor further has a third input port configured to receive a third signal, a fourth input port configured to receive a fourth signal, a third output port configured to generate a third output containing information associated with a third combination of said first, second, third and fourth signals and a fourth output port configured to generate a fourth output containing information associated with a fourth combination of said first, second, third and fourth signals, wherein said first output contains information associated with said first combination of said first, second, third and fourth signals and said second output contains information associated with said second combination of said first, second, third and fourth signals.

7 . The data processing system of claim 1 , wherein said first combination of said first and second signals comprises a first linear combination of said first and second signals.

8 . The data processing system of claim 1 , wherein said first combination of said first and second signals comprises a first linear combination of said first and second signals, and said second combination of said first and second signals comprises a second linear combination of said first and second signals.

9 . The data processing system of claim 1 , wherein said first signal comprises a ground signal.

10 . The data processing system of claim 1 , wherein said first signal comprises a ground signal, and said second signal comprises a ground signal.

11 . The data processing system of claim 1 further comprising a first frequency up-converter arranged downstream of said first processor and a second frequency up-converter arranged downstream of said first processor and in parallel with said first frequency up-converter, wherein said first and second frequency up-converters are configured to frequency up-convert said first and second outputs.

12 . The data processing system of claim 1 further comprising a first amplifier arranged downstream of said first processor and a second amplifier arranged downstream of said first processor and in parallel with said first amplifier, wherein said first and second amplifiers are configured to amplify said first and second outputs.

13 . The data processing system of claim 1 further comprising a first frequency up-converter arranged downstream of said first processor, a second frequency up-converter arranged downstream of said first processor and in parallel with said first frequency up-converter, a first amplifier arranged downstream of said first frequency up-converter and a second amplifier arranged downstream of said second frequency up-converter and in parallel with said first amplifier, wherein said first and second frequency up-converters are configured to frequency up-convert said first and second outputs, wherein said first and second amplifiers are configured to amplify said first and second outputs.

14 . The data processing system of claim 1 further comprising a second processor arranged in parallel with said first processor, wherein said second processor has a third input port configured to receive a third signal, a fourth input port configured to receive a fourth signal, a third output port configured to generate a third output containing information associated with a third combination of said third and fourth signals and a fourth output port configured to generate a fourth output containing information associated with a fourth combination of said third and fourth signals.

15 . The data processing system of claim 14 , wherein said first processor further has a fifth input port configured to receive a fifth signal, a sixth input port configured to receive a sixth signal, a fifth output port configured to generate a fifth output containing information associated with a fifth combination of said first, second, fifth and sixth signals and a sixth output port configured to generate a sixth output containing information associated with a sixth combination of said first, second, fifth and sixth signals, wherein said first output contains information associated with said first combination of said first, second, fifth and sixth signals and said second output contains information associated with said second combination of said first, second, fifth and sixth signals, wherein said second processor further has a seventh input port configured to receive a seventh signal, an eighth input port configured to receive an eighth signal, a seventh output port configured to generate a seventh output containing information associated with a seventh combination of said third, fourth, seventh and eighth signals and an eighth output port configured to generate an eighth output containing information associated with an eighth combination of said third, fourth, seventh and eighth signals, wherein said third output contains information associated with said third combination of said third, fourth, seventh and eighth signals and said fourth output contains information associated with said fourth combination of said third, fourth, seventh and eighth signals.

16 . The data processing system of claim 14 , wherein said first combination of said first and second signals comprises a first linear combination of said first and second signals, said second combination of said first and second signals comprises a second linear combination of said first and second signals, said third combination of said third and fourth signals comprises a third linear combination of said third and fourth signals, and said fourth combination of said third and fourth signa

Assignees

• Spatial Digital Systems Inc

Inventors

• Chang Donald C D

Classifications

• H04W52/34

  TPC management, i.e. sharing limited amount of power among users or channels or data types, e.g. cell loading · CPC title

• H04N21/6193

  involving transmission via a satellite (arrangements for data linking, networking or transporting, or for controlling an end to end session in a satellite broadcast system H04B7/18526) · CPC title

• H04W72/0473 Primary

  the resource being transmission power · CPC title

• H04N21/6143

  involving transmission via a satellite · CPC title

• H04B7/2041 Primary

  Spot beam multiple access · CPC title