Solid-state imaging device, image data transmission method, and camera system

Patent metadata

Field	Value
Publication number	US-2016014365-A1
Application number	US-201514754341-A
Country	US
Kind code	A1
Filing date	Jun 29, 2015
Priority date	Jul 9, 2014
Publication date	Jan 14, 2016
Grant date	—

Abstract

The present invention provides a solid-state imaging device conforming to different data transmission modes. A driver in a CMOS sensor includes a single-end driver which is provided in correspondence with two output terminals, activated in a parallel transmission mode, and outputs a corresponding data signal as a single-end signal to a corresponding output terminal; a serializer which is activated in a serial transmission mode and outputs a plurality of data signals which are supplied in parallel, serially one by one, and a differential driver which is activated in the serial transmission mode and outputs each of data signals output from the serializer as a differential signal to the output terminals.

First claim

What is claimed is:

1 . A solid-state imaging device having a parallel transmission mode and a serial transmission mode, comprising:
a pixel array; an AD converting unit converting each of a plurality of analog signals read from the pixel array to a plurality of digital signals and outputting the digital signals; first and second output terminals; a single-end driver which is activated in the parallel transmission mode and, on the basis of the signals, outputs first and second single-end signals to the first and second output terminals, respectively; and a differential driver which is activated in the serial transmission mode and, on the basis of the digital signals, outputs a positive signal and a negative signal constructing differential signals to the first and second output terminals, respectively.

2 . The solid-state imaging device according to claim 1 ,
wherein each of the first and second single-end signals is a signal of a CMOS (Complementary Metal Oxide Semiconductor) interface standard, each of the positive signal and the negative signal constructing the differential signals is a signal of a SubLVDS (Low Voltage Differential Signal) standard, and the solid-state imaging device further comprises: a level shifter shifting a voltage level of each of the digital signals and supplying the resultant signal to a corresponding single-end driver in the parallel transmission mode; and a serializer receiving the digital signals which are output in parallel from the AD converting unit in the serial transmission mode and supplying the received digital signals to the differential driver in series.

3 . The solid-state imaging device according to claim 2 , wherein the serializer is driven by a reference voltage and a first voltage, includes first and second output nodes for outputting the digital signals, fixes both the first and second output nodes to the first voltage in the parallel transmission mode, and sets any one of the first and second output nodes to the first voltage and sets the other output node to the reference voltage in accordance with logics of the digital signals in the serial transmission mode, the differential driver is driven by the reference voltage and a second voltage higher than the first voltage, activated in the serial transmission mode and, according to the first and second output nodes which are set to the reference voltage and the first voltage, respectively, or set to the first voltage and the reference voltage, respectively, supplies a third voltage lower than the first voltage to any one of the first and second output terminals, and supplies a fourth voltage which lies between the third voltage and the reference voltage to the other output terminal, and the single-end driver is driven by the reference voltage and the second voltage, activated in the parallel transmission mode, and sets each of the first and second output terminals to the reference voltage or the second voltage in accordance with logics of the digital signals.

4 . The solid-state imaging device according to claim 3 ,
wherein the differential driver includes first and second switches and first to fourth P-channel MOS transistors, sources of the first and second P-channel MOS transistors are coupled to one terminal and the other terminal of the first switch, respectively, gates of the first and second P-channel MOS transistors are coupled to the first and second output nodes, respectively, drains of the first and second P-channel MOS transistors are coupled to the second and first output terminals, respectively, sources of the third and fourth P-channel MOS transistors are coupled to the second and first output terminals, gates of the third and fourth P-channel MOS transistors are coupled to the second and first output nodes, respectively, drains of the third and fourth P-channel MOS transistors are coupled to one terminal and the other terminal of the second switch, respectively, and each of the first and second switches becomes nonconductive in the case where at least a voltage of the first output terminal and a voltage of the second output terminal are different from each other in the parallel transmission mode and becomes conductive in the serial transmission mode.

5 . The solid-state imaging device according to claim 4 , further comprising a back-gate control unit applying the second voltage to back gates of the first to fourth P-channel MOS transistors in the parallel transmission mode and applying the third voltage to back gates of the first to fourth P-channel MOS transistors in the serial transmission mode.

6 . The solid-state imaging device according to claim 5 ,
wherein the differential driver further includes an output current generating unit which is activated in the serial transmission mode and supplies output current to each of sources of the first and second P-channel MOS transistors; and an output common voltage control unit which is activated in the serial transmission mode and controls voltages of the drains of the third and fourth P-channel MOS transistors so that common voltage of the first and second output terminals becomes a predetermined voltage.

7 . The solid-state imaging device according to claim 1 ,
wherein the pixel array and the AD converting unit are constructed by thick-film transistors, the serializer is constructed by a thin-film transistor, each of the plurality of single-end drivers is constructed by a thick-film transistor, and the first to fourth P-channel MOS transistors are thin-film transistors.

8 . The solid-state imaging device according to claim 1 ,
wherein the serial transmission mode and the parallel transmission mode are switched on the basis of a control signal output from a control device.

9 . A solid-state imaging device comprising:
a pixel array including a plurality of pixels each converting incident light to an analog signal; an AD converting unit converting each of a plurality of analog signals read from the pixel array to a plurality of data signals and outputting the data signals in parallel, the data signals being divided into a plurality of data groups each including m pieces (m is an integer of two or larger); m pieces of output terminals provided in correspondence with the data groups; a single-end driver which is provided in correspondence with each of output terminals of the data groups, is activated in a single-mode transmission mode, and outputs a corresponding data signal as a single-end signal to a corresponding output terminal; a serializer which is provided in correspondence with each of the data groups and outputs m pieces of corresponding data signals output in parallel from the AD converting unit in a SubLVDS (Low Voltage Differential Signal) mode one by one in series; and a differential driver which is provided in correspondence with first and second output terminals in the m pieces of output terminals in each data group, is activated in the SubLVDS mode, and outputs each of data signals output from the serializer as a differential signal of the SubLVDS standard to the first and second output terminals.

10 . The solid-state imaging device according to claim 9 ,
wherein the serializer is driven by a reference voltage and a first voltage, includes first and second output nodes for outputting the m pieces of data signals in series, fixes both the first and second output nodes to the first voltage in the single-end transmission mode, and sets any one of the first and second output nodes to the first voltage and sets the other output node to the reference voltage in accordance with logics of the output data signals in the SubLVDS mode, the differential driver is driven by the reference voltage and a second voltage higher than the first voltage,

Assignees

• Renesas Electronics Corp

Inventors

• Mizuguchi Tatsuya

Classifications

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/709 Primary

  Circuitry for control of the power supply · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H10F39/80373 Primary

  characterised by the gate of the transistor · CPC title