Solid-state imaging device and method for manufacturing solid-state imaging device

US2016013228A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016013228-A1
Application numberUS-201514717149-A
CountryUS
Kind codeA1
Filing dateMay 20, 2015
Priority dateJul 10, 2014
Publication dateJan 14, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

According to one embodiment, a solid-state imaging device includes a semiconductor layer, a charge transfer region, a floating diffusion (FD), and a reading gate. The semiconductor layer is provided with a photoelectric conversion element. The charge transfer region is formed on a surface of the semiconductor layer over a charge accumulation region in the photoelectric conversion element. The FD is provided on the charge transfer region to hold a charge transferred from the charge accumulation region. The reading gate is provided on a side surface of the FD and a side surface of the charge transfer region via an insulating film.

First claim

Opening claim text (preview).

What is claimed is: 1 . A solid-state imaging device, comprising: a semiconductor layer provided with a photoelectric conversion element; a charge transfer region formed on a surface of the semiconductor layer over a charge accumulation region in the photoelectric conversion element; a floating diffusion disposed on the charge transfer region and configured to hold a charge transferred from the charge accumulation region via the charge transfer region; and a reading gate provided on a side surface of the floating diffusion and a side surface of the charge transfer region via a gate insulating film. 2 . The solid-state imaging device according to claim 1 , wherein the reading gate is formed in an annular shape which surrounds the floating diffusion and the charge transfer region. 3 . The solid-state imaging device according to claim 1 , wherein the reading gate is provided continuously along the side surface of the floating diffusion, the side surface of the charge transfer region, and a surface on a side of the charge accumulation region in which the charge transfer region is provided. 4 . The solid-state imaging device according to claim 3 , wherein the reading gate has an L-shape when viewed in a cross section. 5 . The solid-state imaging device according to claim 1 , wherein a plurality of photoelectric conversion elements is provided in the semiconductor layer in a two-dimensional array shape, and a gate of an amplifier transistor configured to amplify the charge held in the floating diffusion, and a gate of a reset transistor configured to reset the charge held in the floating diffusion are provided on the surface of the semiconductor layer between the adjacent photoelectric conversion elements via a gate insulating film. 6 . The solid-state imaging device according to claim 5 , wherein the gate of the amplifier transistor and the gate of the reset transistor are provided on the same layer on the semiconductor layer. 7 . The solid-state imaging device according to claim 5 , wherein the semiconductor layer includes an element isolation region between the adjacent photoelectric conversion elements, and the gate of the amplifier transistor and the gate of the reset transistor are provided on a surface of the element isolation region via the gate insulating film. 8 . The solid-state imaging device according to claim 1 , wherein the reading gate is provided on a side circumferential surface of a part of the entire side circumferential surfaces of the floating diffusion and the charge transfer region. 9 . A method for manufacturing a solid-state imaging device, comprising: forming a photoelectric conversion element on a semiconductor layer; forming a charge transfer region on a surface of the semiconductor layer over a charge accumulation region in the photoelectric conversion element; forming a floating diffusion configured to hold a charge, which is transferred from the charge accumulation region via the charge transfer region, on the charge transfer region; and forming a reading gate on a side surface of the floating diffusion and a side surface of the charge transfer region via a gate insulating film. 10 . The method for manufacturing a solid-state imaging device according to claim 9 , further comprising: depositing a mask material on the surface of the semiconductor layer formed with the photoelectric conversion element; forming an opening in the mask material by selectively removing the mask material on a surface center of the charge accumulation region; forming an epitaxial region in the opening; and forming the charge transfer region by ion-implanting P-type or N-type impurities to the epitaxial region to perform an annealing process. 11 . The method for manufacturing a solid-state imaging device according to claim 10 , further comprising: forming the floating diffusion, by ion-implanting the N type impurities to a surface layer of the charge accumulation region to perform the annealing process. 12 . The method for manufacturing a solid-state imaging device according to claim 11 , further comprising forming the gate insulating film, by oxidizing a surface of the semiconductor layer except for a portion provided with the charge transfer region, a side surface of the charge transfer region, and a side surface and a surface of the floating diffusion. 13 . The method for manufacturing a solid-state imaging device according to claim 9 , further comprising forming the reading gate having an annular shape which surrounds the floating diffusion and the charge transfer region. 14 . The method for manufacturing a solid-state imaging device according to claim 9 , further comprising forming the reading gate which continues along the side surface of the floating diffusion, the side surface of the charge transfer region, and a surface on a side of the charge accumulation region in which the charge transfer region is provided. 15 . The method for manufacturing a solid-state imaging device according to claim 14 , further comprising forming the reading gate having an L-shape when viewed in a cross section. 16 . The method for manufacturing a solid-state imaging device according to claim 9 , further comprising: forming a plurality of photoelectric conversion elements on the semiconductor layer in a two-dimensional array shape; and forming a gate of an amplifier transistor configured to amplify the charge held in the floating diffusion, and a gate of a reset transistor configured to reset the charge held in the floating diffusion, on the surface of the semiconductor layer between the adjacent photoelectric conversion elements, via a gate insulating film. 17 . The method for manufacturing a solid-state imaging device according to claim 16 , further comprising forming the reading gate, the gate of the amplifier transistor, and the gate of the reset transistor at the same time. 18 . The method for manufacturing a solid-state imaging device according to claim 16 , further comprising: forming an element isolation region between the adjacent photoelectric conversion elements in the semiconductor layer; and forming the gate of the amplifier transistor and the gate of the reset transistor on a surface of the element isolation region via a gate insulating film. 19 . The method for manufacturing a solid-state imaging device according to claim 9 , further comprising forming the reading gate on a side circumferential surface of a part of the entire side circumferential surfaces of the floating diffusion and the charge transfer region, via the gate insulating film.

Assignees

Inventors

Classifications

  • the integrated elements comprising a transistor · CPC title

  • Photosensitive area · CPC title

  • Pixel isolation structures · CPC title

  • Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes · CPC title

  • Back-illuminated image sensors · CPC title

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What does patent US2016013228A1 cover?
According to one embodiment, a solid-state imaging device includes a semiconductor layer, a charge transfer region, a floating diffusion (FD), and a reading gate. The semiconductor layer is provided with a photoelectric conversion element. The charge transfer region is formed on a surface of the semiconductor layer over a charge accumulation region in the photoelectric conversion element. The F…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10F39/80373. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).