Method of manufacturing thin film transistor

Patent metadata

Field	Value
Publication number	US-2016013222-A1
Application number	US-201414567980-A
Country	US
Kind code	A1
Filing date	Dec 11, 2014
Priority date	Jul 14, 2014
Publication date	Jan 14, 2016
Grant date	—

Abstract

A method of manufacturing a thin film transistor is disclosed. In one aspect, the method includes forming an active layer over a substrate and forming a gate insulating layer containing a dopant over the active layer. The method also includes irradiating laser light onto the gate insulating layer such that the dopant of the gate insulating layer diffuses into the active layer.

First claim

What is claimed is:

1 . A method of manufacturing a thin film transistor, the method comprising:
forming an active layer over a substrate; forming a gate insulating layer containing a dopant over the active layer; and irradiating laser light onto the gate insulating layer such that the dopant of the gate insulating layer diffuses into the active layer.

2 . The method of claim 1 , wherein the forming of the active layer comprises:
forming the active layer in an amorphous state over the substrate; and crystallizing the active layer from the amorphous state into a crystalline state.

3 . The method of claim 1 , wherein the dopant is substantially uniformly diffused into substantially the entire region of the active layer.

4 . The method of claim 1 , wherein the forming of the active layer comprises forming the active layer in an amorphous state over the substrate, and wherein the irradiating comprises crystallizing the active layer from the amorphous state into a crystalline state by the irradiating.

5 . The method of claim 1 , wherein the forming of the gate insulating layer comprises forming an auxiliary insulating layer containing no dopant in a layer adjoining the gate insulating layer.

6 . The method of claim 1 , further comprising:
forming a gate electrode facing a channel portion in a center of the active layer over the gate insulating layer; and additionally doping a dopant into contact portions on both end sides of the channel portion while using the gate electrode as a mask.

7 . The method of claim 6 , wherein the additionally doping comprises ion implanting the dopant in the contact portions.

8 . The method of claim 7 , further comprising activating the additionally doped dopant by irradiating laser light with respect to the contact portions.

9 . The method of claim 6 , wherein the additionally doping comprises irradiating laser light onto the contact portions such that the dopant of the gate insulating layer is doped by diffusion into the contact portions.

10 . The method of claim 6 , further comprising:
forming an interlayer insulating film over the gate electrode; and forming a source electrode and a drain electrode connected to the contact portions on the interlayer insulating film.

11 . The method of claim 1 , wherein the active layer comprises a channel portion in a center of the active layer and contact portions on both end sides of the channel portion, and wherein the dopant of the gate insulating layer substantially uniformly diffuses into the channel portion and the contact portions by the irradiating.

12 . A method of manufacturing a display device, the method comprising:
forming a thin film transistor over a substrate; and forming a pixel electrode to be electrically connected to the thin film transistor, wherein the forming of the thin film transistor comprises:
forming an active layer over the substrate;
forming a gate insulating layer containing a dopant over the active layer; and
irradiating laser light onto the gate insulating layer such that the dopant of the gate insulating layer diffuses into the active layer.

13 . The method of claim 12 , further comprising forming an organic light-emitting layer on the pixel electrode.

14 . The method of claim 13 , wherein the organic light-emitting layer does not overlap the active layer.

15 . The method of claim 12 , wherein the forming of the active layer comprises:
forming the active layer in an amorphous state over the substrate; and crystallizing the active layer from the amorphous state into a crystalline state.

16 . The method of claim 12 , wherein the dopant is substantially uniformly diffused into substantially the entire region of the active layer.

17 . The method of claim 12 , wherein the forming of the active layer comprises forming the active layer in an amorphous state over the substrate, and wherein the irradiating comprises crystallizing the active layer from the amorphous state into a crystalline state by the irradiating.

18 . The method of claim 12 , wherein the forming of the gate insulating layer comprises forming an auxiliary insulating layer containing no dopant in a layer adjoining the gate insulating layer.

19 . The method of claim 12 , further comprising:
forming a gate electrode facing a channel portion in a center of the active layer over the gate insulating layer; and additionally doping a dopant into contact portions on both end sides of the channel portion while using the gate electrode as a mask.

20 . The method of claim 12 , wherein the additionally doping comprises irradiating laser light onto the contact portions such that the dopant of the gate insulating layer is doped by diffusion into the contact portions.

Assignees

• Samsung Display Co Ltd

Inventors

• Park Sang-Jin
• Kim Myung-Ho
• Moon Jun-Hwan
• Lee Keun-Chang
• Cho Yoon-Jong

Classifications

• H10D30/6739 Primary

  Conductor-insulator-semiconductor electrodes · CPC title

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

• H10D30/0314

  of lateral top-gate TFTs comprising only a single gate · CPC title

• H10K71/421 Primary

  using coherent electromagnetic radiation, e.g. laser annealing · CPC title

• H10K59/123

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title