Method and system for gallium nitride electronic devices using engineered substrates

US2016013045A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016013045-A1
Application numberUS-201514617854-A
CountryUS
Kind codeA1
Filing dateFeb 9, 2015
Priority dateAug 10, 2012
Publication dateJan 14, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the GaN-based functional layers and removing at least a portion of the engineered substrate structure. The method further includes forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers and removing the carrier substrate.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for fabricating an electronic device, the method comprising: providing an engineered substrate structure comprising a III-nitride seed layer; forming GaN-based functional layers coupled to the III-nitride seed layer; forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers; joining a carrier substrate opposing the GaN-based functional layers; removing at least a portion of the engineered substrate structure; forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers; and removing the carrier substrate. 2 . The method of claim 1 further comprising joining a device substrate to the second electrode prior to removing the carrier substrate. 3 . The method of claim 1 wherein the III-nitride seed layer comprises a GaN material. 4 . The method of claim 1 wherein the III-nitride seed layer comprises an n-type GaN-based material. 5 . The method of claim 1 further comprising epitaxially growing a III-nitride buffer layer coupled to the III-nitride seed layer and a III-nitride drift layer coupled to the III-nitride buffer layer. 6 . The method of claim 5 wherein forming GaN-based functional layers comprises epitaxially growing the GaN-based functional layers. 7 . The method of claim 1 wherein joining the carrier wafer to the GaN-based functional layers comprises: forming an electrode structure coupled to at least a portion of one of the GaN-based functional layers; forming a sacrificial bonding layer coupled to another portion of the one of the GaN-based functional layers and at least a portion of the electrode structure; and bonding the carrier wafer to the sacrificial bonding layer. 8 . The method of claim 7 wherein removing the carrier substrate comprises removing the sacrificial bonding layer. 9 . The method of claim 1 wherein the engineered substrate comprises a handle wafer and a bonding layer coupled to the III-nitride seed layer, and wherein removing at least a portion of the engineered substrate structure comprises mechanically removing the handle wafer, chemically etching the bonding layer, and physically etching the III-nitride seed layer.

Assignees

Inventors

Classifications

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

  • Bond pads having multiple stacked layers · CPC title

  • Bond pads specially adapted therefor · CPC title

  • Connecting techniques · CPC title

  • Soldering or alloying · CPC title

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What does patent US2016013045A1 cover?
A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the G…
Who is the assignee on this patent?
Avogy Inc
What technology area does this patent fall under?
Primary CPC classification H10P14/3416. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).