Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
US2016012902A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016012902-A1 |
| Application number | US-201514862412-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 23, 2015 |
| Priority date | Mar 25, 2013 |
| Publication date | Jan 14, 2016 |
| Grant date | — |
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A semiconductor memory device includes a memory cell array, a sense amplifier, a register, a controller. The memory cell array includes a memory cell. The sense amplifier connects to the bit line. The register holds write data, and a write voltage. The controller outputs a busy signal. The controller causes the register to hold the write data and the write voltage upon receiving the first command, and resumes the write operation based on the write data and the write voltage held in the register upon receiving the resumption command.
Opening claim text (preview).
What is claimed is: 1 . A nonvolatile semiconductor memory device comprising: a memory cell array including a memory cell; a sense amplifier electrically connected to the memory cell; a register configured, when a write operation is interrupted, to be capable of holding information including write data, a write voltage, and a threshold distribution of the memory cell at the time of interruption; and a controller configured to output a busy signal representing that the writ…
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