Composition for interlayer filler of layered semiconductor device, layered semiconductor device, and process for producing layered semiconductor device

Patent metadata

Field	Value
Publication number	US-2016009947-A1
Application number	US-201514859526-A
Country	US
Kind code	A1
Filing date	Sep 21, 2015
Priority date	Mar 28, 2013
Publication date	Jan 14, 2016
Grant date	—

Abstract

To provide a composition which satisfies a high K1c value, a high glass transition temperature and a low viscosity simultaneously, and which is capable of forming an interlayer filler layer for a layered semiconductor device of which stable bonding is maintained even regardless of changes of environment.
A composition comprising an epoxy compound (A) having a viscosity at 25° C. of at most 50 Pa·s, an amine compound (B) having a melting point or softening point of at least 80° C., and an amine compound (C) having a melting point or softening point of less than 80° C., wherein the proportion of the amine compound (C) is at least 1 part by weight and less than 40 parts by weight per 100 parts by weight of the total amount of the amine compound (B) and the amine compound (C).

First claim

What is claimed is:

1 . A composition comprising an epoxy compound (A) having a viscosity at 25° C. of at most 50 Pa·s, an amine compound (B) having a melting point or softening point of at least 80° C., and an amine compound (C) having a melting point or softening point of less than 80° C., wherein the proportion of the amine compound (C) is at least 1 part by weight and less than 40 parts by weight per 100 parts by weight of the total amount of the amine compound (B) and the amine compound (C).

2 . The composition according to claim 1 , wherein the amine compound (C) is a compound having an amino group directly bonded to a ring having aromaticity.

3 . The composition according to claim 1 , wherein the amine compound (C) is a compound represented by the following formula (1):

wherein n is an integer of from 1 to 10.

4 . The composition according to claim 1 , wherein the viscosity at 75° C. of the amine compound (C) is at most 50 Pa·s.

5 . The composition according to claim 1 , wherein the epoxy equivalent of the epoxy compound (A) is at least 150 g/equivalent and at most 650 g/equivalent.

6 . The composition according to claim 1 , which further contains at least one type of inorganic filler (D).

7 . A composition comprising an epoxy compound (A-1) having a melt viscosity at 120° C. of at least 0.001 Pa·s and at most 1 Pa·s, an inorganic filer (D-1) having a volume average particle size of at least 0.1 μm and at most 10 μm, and an inorganic filler (D-2) consisting of a chemical species different from the inorganic filler (D-1) having a volume average particle size of at least 0.1 μm and at most 10 μm and different from the volume average particle size of the inorganic filler (D-1).

8 . The composition according to claim 7 , wherein the difference in the volume average particle size between the inorganic filler (D-1) and the inorganic filler (D-2) is at least 1 μm and at most 5 μm.

9 . The composition according to claim 7 , wherein the inorganic filler (D-1) is a boron nitride filler.

10 . The composition according to claim 7 , wherein the inorganic filler (D-1) is a silica filler.

11 . The composition according to claim 7 , wherein the epoxy equivalent of the epoxy compound (A-1) is at least 150 g/equivalent and at most 650 g/equivalent.

12 . The composition according to claim 1 , which contains a flux (E).

13 . The composition according to claim 1 , which contains a dispersing agent (F).

14 . A layered semiconductor device comprising a plurality of substrates and an interlayer filler layer formed between the substrates, wherein at least one interlayer filler layer is a layer obtained by curing the composition as defined in claim 1 .

15 . The layered semiconductor device according to claim 14 , wherein at least one of the substrates is a semiconductor substrate having a semiconductor device layer formed thereon.

16 . The layered semiconductor device according to claim 15 , which has a plurality of such semiconductor substrates.

17 . A process for producing a layered semiconductor device, which comprises a step of forming a layer of the composition as defined in claim 1 on the surface of a semiconductor substrate having a semiconductor device layer formed thereon by a pre-application method, laminating the semiconductor substrate and another substrate and pressure-bonding them, and treating the laminate at from 120° C. to 180° C.

18 . The process for producing a layered semiconductor device according to claim 17 , wherein said another substrate is a semiconductor base having a semiconductor device layer formed thereon.

Assignees

• Mitsubishi Chem Corp

Inventors

• Sugiyama Masaya
• Kawase Yasuhiro
• Ikemoto Makoto
• Kiritani Hideki
• Yamazaki Masanori

Classifications

• H10W72/07332

  Compression bonding, e.g. thermocompression bonding · CPC title

• H10W72/07331

  Connecting techniques · CPC title

• H10W72/01365

  Thermally treating (reflowing H10W72/01357) · CPC title

• H10W72/354

  comprising polymers · CPC title

• C08L63/00 Primary

  Compositions of epoxy resins; Compositions of derivatives of epoxy resins · CPC title