Doherty amplifier

US2016006399A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016006399-A1
Application numberUS-201314759202-A
CountryUS
Kind codeA1
Filing dateJan 10, 2013
Priority dateJan 10, 2013
Publication dateJan 7, 2016
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A two-way Doherty amplifier for amplifying a modulated or non-modulated carrier signal, said carrier signal having a carrier frequency; wherein the Doherty amplifier comprises a first amplifier having a first amplifier output node, a second amplifier having a second amplifier output node, a combining node connected or connectable to a load, a first amplifier output line connecting the first amplifier output node to the combining node, and a second amplifier output line connecting the second amplifier output node to the combining node, and wherein the first amplifier output line has an electrical length of substantially one quarter wavelength of the carrier signal and the second amplifier output line has an electrical length of substantially one half wavelength of the carrier signal.

First claim

Opening claim text (preview).

1 . A two-way Doherty amplifier comprising: a first amplifier having a first amplifier output node; a second amplifier having a second amplifier output node; a combining node coupled to a load; a first amplifier output line coupling the first amplifier output node to the combining node; and a second amplifier output line coupling the second amplifier output node to the combining node, wherein the first amplifier output line has an electrical length of substantially one quarter wavelength of a carrier signal, the second amplifier output line has an electrical length of substantially one half wavelength of the carrier signal, and the carrier signal is one of modulated or non-modulated. 2 . The Doherty amplifier of claim 1 , wherein the first amplifier is a main amplifier and the second amplifier is a peak amplifier, or vice versa. 3 . The Doherty amplifier of claim 1 , wherein the first amplifier and the second amplifier are of the same build. 4 . The Doherty amplifier of claim 1 , comprises a ground node for providing a ground voltage, wherein the carrier signal in each of said first amplifier output node, said second amplifier output node, and said combining node is represented by the local voltage at the respective node relative to said ground or reference voltage. 5 . The Doherty amplifier of claim 1 comprises a first substrate and a second substrate, wherein the first amplifier and the second amplifier are arranged on the first substrate and the combining node is arranged on the second substrate. 6 . The Doherty amplifier of claim 5 , wherein the first substrate is made substantially of a first material, the second substrate is made substantially of a second material, and the second material has a lower electrical conductivity than the first material. 7 . The Doherty amplifier of claim 5 , wherein there is an air gap between the first substrate and the second substrate and wherein the first amplifier output line and the second amplifier output line bridge the air gap. 8 . The Doherty amplifier of claim 1 , wherein the first amplifier output line comprises a wire that couples the first amplifier output node to the combining node wherein the wire has an inductance that, in conjunction with an output parasitic capacitance and a second substrate, provides a required optimal characteristic impedance and a phase shift of the carrier signal of less than 90° or an electrical length shorter than approximately one quarter wavelength at most. 9 . The Doherty amplifier of claim 1 , wherein the second amplifier output line comprises: a first wire; an intermediate node; and a second wire, wherein the first wire connects the second amplifier output node to the intermediate node, the second wire connects the intermediate node to the combining node, and the first wire and the second wire each have inductances, which in conjunction with an output parasitic capacitance and capacitances of bond-pads of a second substrate provide a required optimal characteristic impedance and an overall 180° phase shift or an electrical length of approximately one half-wavelength of the carrier signal, respectively. 10 . The Doherty amplifier of claim 9 , comprising a first substrate and a second substrate, wherein the second amplifier output node is arranged on the first substrate and the combining node is arranged on the second substrate. 11 . The Doherty amplifier of claim 1 , wherein the first amplifier output line comprises a first microcoil, the second amplifier output line comprises a second microcoil and a third microcoil, the second microcoil and the third microcoil are connected in series, and the first, second, and third microcoils each provide the required optimal characteristic impedance and equivalent electrical length of approximately one quarter wavelength of the carrier signal, respectively. 12 . The Doherty amplifier of claim 1 , wherein the carrier frequency is above 500 MHz. 13 . The Doherty amplifier of claim 1 , wherein the first amplifier and the second amplifier are high gain Monolithic Microwave Integrated Circuit amplifiers arranged inside a low cost plastic package with their outputs connected to separate leads by inductances and, and wherein components are arranged outside the package on a printed circuit board. 14 . The Doherty amplifier of claim 1 , further comprising a group delay corrector coupled to the input of the main amplifier, wherein a phase or group delay characteristic frequency response in the operational frequency band has a character opposite to the one generated by the impedance inverter or Doherty combiner connected to the output of main amplifier/device at every each power level. 15 . The Doherty amplifier of claim 14 , wherein said group delay corrector is made of an inductive element, a capacitive element and a resistive element connected in parallel to each other and in series with an input of the main amplifier. 16 . The Doherty amplifier of claim 13 , wherein the group delay corrector is made of an inductive element, a capacitive element and a resistive element connected in series, with one end of the group delay corrector connected to an input of the main amplifier and the other end connected to a reference node or ground. 17 . The Doherty amplifier of claim 13 , comprising a voltage-controlled resistive component for controlling the group delay corrector Q factor, wherein this resistive component is connected in parallel to the group delay corrector. 18 . The Doherty amplifier of claim 17 , wherein the voltage-controlled resistive component is a field-effect transistor, a metal-oxide-semiconductor field-effect transistor, or a pseudomorphic high electron mobility transistor. 19 . The Doherty amplifier of claim 13 , comprising an envelope detector for controlling the group delay corrector. 20 . The Doherty amplifier of claim 13 , wherein an additional phase shift or a delay is provided by an additional transmission line at the input of the peak amplifier which is approximately equal to that introduced by said group delay corrector connected at the input of the first amplifier at or close to a peak power level of the Doherty amplifier. 21 . (canceled) 22 . (canceled)

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Classifications

  • between laterally-adjacent chips · CPC title

  • multiple bond wires connected to common bond pads at both ends of the wires · CPC title

  • the connected ends being wedge-shaped · CPC title

  • using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

  • with field-effect devices (H03F3/195 takes precedence) · CPC title

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What does patent US2016006399A1 cover?
A two-way Doherty amplifier for amplifying a modulated or non-modulated carrier signal, said carrier signal having a carrier frequency; wherein the Doherty amplifier comprises a first amplifier having a first amplifier output node, a second amplifier having a second amplifier output node, a combining node connected or connectable to a load, a first amplifier output line connecting the first amp…
Who is the assignee on this patent?
Freescale Semiconductor Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0288. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).