Method of and Apparatus for Protecting a Switch, Such as a MEMS Switch, and to a MEMS Switch Including Such a Protection Apparatus

Patent metadata

Field	Value
Publication number	US-2016006241-A1
Application number	US-201514743396-A
Country	US
Kind code	A1
Filing date	Jun 18, 2015
Priority date	Jul 2, 2014
Publication date	Jan 7, 2016
Grant date	—

Abstract

A method of and apparatus for protecting a MEMS switch is provided. The method and apparatus improve the integrity of MEMS switches by reducing their vulnerability to current flow through them during switching of the MEMS switch between on and off or vice versa. The protection circuit provides for a parallel path, known as a shunt, around the MEMS component. However, components within the shunt circuit can themselves be removed from the shunt when they are not required. This improves the electrical performance of the shunt when the switch is supposed to be in an off state.

First claim

What is claimed is:

1 . A method of protecting a switch, comprising providing a shunt path in parallel with the switch, wherein the shunt path comprises at least one solid state device in series with at least one mechanical switch.

2 . A method as claimed in claim 1 , in which the switch is a MEMS switch.

3 . A method as claimed in claim 1 , in which the at least one mechanical switch comprises a MEMS switch.

4 . A method as claimed in claim 1 , in which the or each mechanical switch has a respective switch shunt, or other means for reducing a potential difference across the mechanical switch.

5 . A method as claimed in claim 1 , in which the switch has a first node and a second node, and the first node is selectively connectable to a common mode by way of a first node mechanical switch, and the second node is selectively connectable to the common node by way of a second node mechanical switch.

6 . A method as claimed in claim 1 , further comprising placing the shunt path in a low impedance state prior to switching of the switch.

7 . A method as claimed in claim 1 , in which the at least one solid state device comprises a transistor or a diode.

8 . A method of protecting a MEMS switch, comprising placing a shunt path in parallel with the MEMS switch, wherein the shunt path comprises at least one further MEMS switch.

9 . A method as claimed in claim 8 , where the at least one further MEMS switch is in parallel with a respective shunt component, or in parallel with a circuit for reducing a potential difference across a respective further MEMS switch.

10 . A method as claimed in claim 9 , in which the shunt component comprises a resistance.

11 . A method as claimed in claim 8 , in which the shunt path comprises at least one transistor switch in series with the at least one MEMS switch.

12 . A MEMS switch having a first switch node and a second switch node, the MEMS switch in association with a protection circuit arranged to selectively provide a low impedance path between the first and second switch nodes of the MEMS switch, the protection circuit comprising a first protection circuit MEMS switch and components for limiting the voltage across or the current through the first protection circuit MEMS switch around a switch transition of the first protection circuit MEMS switch.

13 . A MEMS switch as claimed in claim 12 , in which the first protection circuit MEMS switch is in series with a resistor.

14 . A MEMS switch as claimed in claim 12 , in which the first protection circuit has a shunt.

15 . A MEMS switch as claimed in claim 12 , in which the first protection circuit MEMS switch is in series with a semiconductor switch.

16 . A MEMS switch as claimed in claim 12 , further comprising a second protection circuit MEMS switch.

17 . A MEMS switch as claimed in claim 16 , in which the first protection circuit MEMS switch has a first node connected to the first switch node, and a second node connected to a first current flow node of a semiconductor device, and the second protection circuit MEMS switch has a first node connected to the second switch node and a second node connected to a second current flow node of the semiconductor device.

18 . A MEMS switch as claimed in claim 16 , in which the first protection circuit MEMS switch has a first node connected between the first switch node and a semiconductor switch or a semiconductor switch array, and the second protection circuit MEMS switch is connected between the second switch node and the semiconductor switch or the semiconductor switch array, and where the semiconductor switch or the semiconductor switch array is operable to connect the first and second protection circuit MEMS switches together or to a further node.

19 . A MEMS switch as claimed in claim 12 , in which the switch and the protection circuit are provided in a shared integrated circuit or chip package.

20 . An integrated circuit comprising at least one MEMS switch as claimed in claim 12 .

21 . An integrated circuit as claimed in claim 20 , in which the MEMS switch is formed on a first substrate and at least some components of the protection circuit are formed on a second substrate, and interconnections are made between nodes of the first and second substrates.

22 . A MEMS switch as claimed in claim 12 , further including a controller for controlling operation of the protection circuit and the MEMS switch.

23 . A MEMS switch comprising a first MEMS switch and a second MEMS switch, the first and second switches being connected in parallel, and a control circuit for controlling the first and second MEMS switches such that the second switch is always closed when the first switch is switching between open and closed.

24 . A method of protecting a switch, comprising providing a shunt path in parallel with the switch, wherein the shunt path comprises
a) at least one solid state switch in series with a high stop filter; or b) an amplifier arranged to selectively reduce a potential difference across the switch.

25 . A MEMS switch in association with a shunt path in parallel with the MEMS switch, wherein the shunt path comprises at least one solid state switch in series with at least one inductor.

Assignees

• Analog Devices Global

Inventors

• Fitzgerald Padraig L
• Carty Eric James

Classifications

• H01H9/547

  Combinations of mechanical switches and static switches, the latter being controlled by the former · CPC title

• H01H59/0009 Primary

  making use of micromechanics · CPC title

• H01H9/542

  Contacts shunted by static switch means · CPC title

• H01H1/0036 Primary

  Switches making use of microelectromechanical systems [MEMS] (for electromagnetic relays H01H50/005; for electrostatic relays H01H59/0009) · CPC title

• H02H9/04 Primary

  responsive to excess voltage (lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T) · CPC title