Integrated circuit product with a gate height registration structure

Patent metadata

Field	Value
Publication number	US-2016005733-A1
Application number	US-201514855881-A
Country	US
Kind code	A1
Filing date	Sep 16, 2015
Priority date	Apr 1, 2014
Publication date	Jan 7, 2016
Grant date	—

Abstract

One illustrative device disclosed includes, among other things, first and second active regions that are separated by an isolation region, first and second replacement gate structures positioned above the first and second active regions, respectively, and a gate registration structure positioned above the isolation region, wherein the gate registration structure comprises a layer of insulating material positioned above the isolation region and a polish-stop layer and wherein a first end surface of the first replacement gate structure abuts and engages a first side surface of the gate registration structure and a second end surface of the second replacement gate structure abuts and engages a second side surface of the gate registration structure.

First claim

What is claimed:

1 . An integrated circuit product, comprising:
first and second spaced-apart active regions of a semiconductor substrate that are separated by an isolation region positioned in said substrate; a first replacement gate structure positioned above said first active region, said first replacement gate structure having a first end surface; a second replacement gate structure positioned above said second active region, said second replacement gate structure having a second end surface; and a gate registration structure positioned above said isolation region, wherein said gate registration structure comprises a layer of insulating material positioned above said isolation region and a polish-stop layer positioned on said layer of insulating material and wherein said first end surface of said first replacement gate structure abuts and engages a first side surface of said gate registration structure and said second end surface of said second replacement gate structure abuts and engages a second side surface of said gate registration structure, wherein said first and second side surfaces of said gate registration structure are located on opposing sides of said gate registration structure.

2 . The integrated circuit product of claim 1 , further comprising first and second gate cap layers positioned above said first and second replacement gate structures, respectively, wherein said first and second gate cap layers abut and engage at least said polish-stop layer of said gate registration structure.

3 . The integrated circuit product of claim 2 , wherein said first and second gate cap layers further abut and engage said layer of insulating material of said gate registration structure.

4 . The integrated circuit product of claim 1 , wherein said gate registration structure is positioned only above said isolation region and not above either of said first and second spaced-apart active regions.

5 . The integrated circuit product of claim 1 , wherein each of said first and second replacement gate structures have first sidewall surfaces that extend in a direction substantially parallel to a long axis of said first and second replacement gate structures and said integrated circuit product further comprises sidewall spacers positioned only along first sidewalls of said first and second replacement gate structures.

6 . The integrated circuit product of claim 1 , wherein said first and second replacement gate structures are each comprised of a layer of high-k insulating material and at least one layer of metal.

7 . An integrated circuit product, comprising:
first and second spaced-apart active regions of a semiconductor substrate that are separated by an isolation region positioned in said substrate; a first replacement gate structure positioned above said first active region, said first replacement gate structure having a first end surface; a second replacement gate structure positioned above said second active region, said second replacement gate structure having a second end surface; first and second gate cap layers positioned above said first and second replacement gate structures, respectively, and a gate registration structure this is positioned only above said isolation region and not above either of said first and second spaced-apart active regions, wherein said gate registration structure comprises a layer of insulating material positioned above said isolation region and a polish-stop layer positioned on said layer of insulating material and wherein said first end surface of said first replacement gate structure abuts and engages a first side surface of said gate registration structure and said second end surface of said second replacement gate structure abuts and engages a second side surface of said gate registration structure, wherein said first and second side surfaces of said gate registration structure are located on opposing sides of said gate registration structure and wherein said first and second gate cap layers further abut and engage at least said polish-stop layer of said gate registration structure.

8 . The integrated circuit product of claim 7 , wherein said first and second gate cap layers further abut and engage said layer of insulating material of said gate registration structure.

9 . The integrated circuit product of claim 8 , wherein each of said first and second replacement gate structures have first sidewall surfaces that extend in a direction substantially parallel to a long axis of said first and second replacement gate structures and said integrated circuit product further comprises sidewall spacers positioned only along first sidewalls of said first and second replacement gate structures.

10 . An integrated circuit product, comprising:
first and second spaced-apart active regions of a semiconductor substrate that are separated by an isolation region positioned in said substrate; a first replacement gate structure positioned above said first active region, said first replacement gate structure having a first end surface; a second replacement gate structure positioned above said second active region, said second replacement gate structure having a second end surface; first and second gate cap layers positioned above said first and second replacement gate structures, respectively; and a gate registration structure positioned above said isolation region, wherein said gate registration structure comprises a layer of insulating material positioned above said isolation region and a polish-stop layer positioned on said layer of insulating material and wherein said first end surface of said first replacement gate structure abuts and engages a first side surface of said gate registration structure and said second end surface of said second replacement gate structure abuts and engages a second side surface of said gate registration structure, wherein said first and second side surfaces of said gate registration structure are located on opposing sides of said gate registration structure, wherein said first and second gate cap layers abut and engage at least said polish-stop layer of said gate registration structure.

11 . The integrated circuit product of claim 10 , further comprising first and second gate cap layers positioned above said first and second replacement gate structures, respectively, wherein said first and second gate cap layers abut and engage at least said polish-stop layer and said layer of insulating material of said gate registration structure.

12 . The integrated circuit product of claim 10 , wherein said gate registration structure is positioned only above said isolation region and not above either of said first and second spaced-apart active regions.

13 . The integrated circuit product of claim 12 , wherein each of said first and second replacement gate structures have first sidewall surfaces that extend in a direction substantially parallel to a long axis of said first and second replacement gate structures and said integrated circuit product further comprises sidewall spacers positioned only along first sidewalls of said first and second replacement gate structures.

Assignees

• Globalfoundries Inc
• IBM

Inventors

• Xie Ruilong
• Wedlake Michael
• Cai Xiuyu
• Khakifirooz Ali
• Cheng Kangguo

Classifications

• H10P95/062

  involving a dielectric removal step · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10D64/01302

  the insulator being formed after the semiconductor body, the semiconductor being silicon · CPC title

• H10D84/0151

  Manufacturing their isolation regions · CPC title

• H10D84/0135

  Manufacturing their gate conductors · CPC title