Semiconductor device and method for making semiconductor device

US2016005708A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016005708-A1
Application numberUS-201514755334-A
CountryUS
Kind codeA1
Filing dateJun 30, 2015
Priority dateJul 4, 2014
Publication dateJan 7, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes: a substrate including a base member having a main surface and a back surface facing opposite in a thickness direction; a semiconductor element mounted on the main surface of the substrate and having at least one element pad; a wire having a bonding portion bonded to the element pad; and a sealing resin formed on the main surface of the substrate for covering the wire and at least a portion of the semiconductor element. The semiconductor element has an element exposed side surface that faces in a direction crossing the thickness direction of the substrate and is exposed from the sealing resin.

First claim

Opening claim text (preview).

1 . A semiconductor device comprising: a substrate including a base member having a main surface and a back surface facing opposite in a thickness direction; a semiconductor element having at least one element pad and mounted on the main surface of the substrate; a wire having a bonding portion bonded to the element pad; and a sealing resin formed on the main surface of the substrate, and covering the wire and at least a portion of the semiconductor element, wherein the semiconductor element includes an element exposed surface that faces in a direction crossing the thickness direction of the substrate and is exposed from the sealing resin. 2 . The semiconductor device according to claim 1 , wherein the base member includes a substrate outer side surface that connects the main surface and the back surface to each other and is flush with the element exposed side surface of the semiconductor element. 3 . The semiconductor device according to claim 2 , wherein the sealing resin has a sealing resin outer surface flush with both the element exposed side surface of the semiconductor element and the substrate outer side surface of the base member. 4 . The semiconductor device according to claim 1 , wherein the element exposed side surface of the semiconductor element is perpendicular to the thickness direction of the substrate. 5 . The semiconductor device according to claim 1 , wherein the semiconductor element has a first main portion and a second main portion. 6 . The semiconductor device according to claim 5 , wherein the element exposed side surface is formed on the first main portion. 7 . The semiconductor device according to claim 6 , wherein the first main portion is formed of a semiconductor. 8 . The semiconductor device according to claim 5 , wherein the second main portion has a bonding surface on which the element pad is formed. 9 . The semiconductor device according to claim 8 , wherein the second main portion is formed of an insulating material. 10 . The semiconductor device according to claim 9 , wherein the second main portion is formed of a resin. 11 . The semiconductor device according to claim 5 , wherein the first main portion and the second main portion are arranged side by side in a direction in which the element exposed side surface faces. 12 . The semiconductor device according to claim 11 , wherein a dimension of the first main portion in the thickness direction of the substrate is greater than a dimension of the first main portion in a direction in which the element exposed side surface faces. 13 . The semiconductor device according to claim 11 , wherein a dimension of the second main portion in the thickness direction of the substrate is greater than a dimension of the second main portion in a direction in which the element exposed side surface faces. 14 . The semiconductor device according to claim 12 , wherein a dimension of the semiconductor element in the thickness direction of the substrate is greater than a dimension of the semiconductor element in a direction in which the element exposed side surface faces. 15 . The semiconductor device according to claim 1 , wherein the semiconductor element is bonded to the substrate by a bonding member. 16 . The semiconductor device according to claim 15 , wherein the bonding member is an insulating bonding member. 17 . The semiconductor device according to claim 15 , wherein the bonding member is a conductive bonding member. 18 . The semiconductor device according to claim 15 , wherein the bonding member has a bonding member exposed side surface flush with the element exposed side surface. 19 . The semiconductor device according to claim 1 , wherein the semiconductor element is a direction sensor element including a detection reference axis in the first main portion. 20 . The semiconductor device according to claim 19 , wherein the detection reference axis is parallel to the thickness direction of the substrate. 21 . A method for making a semiconductor device, the method comprising: mounting a semiconductor element on a main surface of a substrate, the semiconductor element having an element pad; bonding a wire to the element pad; forming a sealing resin covering the semiconductor element and the wire; and simultaneously cutting the substrate, the semiconductor element and the sealing resin. 22 . The method according to claim 21 , wherein in the mounting the semiconductor element, the semiconductor element is bonded to the substrate by a bonding member, and in the cutting, the substrate, the semiconductor element, the sealing resin and the bonding member are simultaneously cut.

Assignees

Inventors

Classifications

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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Frequently asked questions

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What does patent US2016005708A1 cover?
A semiconductor device includes: a substrate including a base member having a main surface and a back surface facing opposite in a thickness direction; a semiconductor element mounted on the main surface of the substrate and having at least one element pad; a wire having a bonding portion bonded to the element pad; and a sealing resin formed on the main surface of the substrate for covering the…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification G01R33/02. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jan 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).