Manufacturing method for semiconductor device and semiconductor device

Patent metadata

Field	Value
Publication number	US-2016005605-A1
Application number	US-201514690968-A
Country	US
Kind code	A1
Filing date	Apr 20, 2015
Priority date	Jul 7, 2014
Publication date	Jan 7, 2016
Grant date	—

Abstract

In a manufacturing method for a semiconductor device according to an embodiment, a first heat treatment to anneal or oxidize an SiC layer in an atmosphere where a gas including carbon (C) exists is applied. Further, the semiconductor device according to the embodiment includes: an SiC substrate having a first surface and a second surface; a first conductivity type SiC layer disposed on the first surface side of the SiC substrate, and including a low level density region having Z 1/2 level density of 1×10 11 cm −3 or less measured by deep level transient spectroscopy (DLTS); a second conductivity type SiC region disposed on a surface of the SiC layer; a first electrode disposed on the SiC region; and a second electrode disposed on the second surface side of the SiC substrate.

First claim

What is claimed is:

1 . A manufacturing method for a semiconductor device, comprising applying a first thermal treatment to anneal or oxidize an SiC layer in an atmosphere where a gas including carbon (C) exists.

2 . The method according to claim 1 , further comprising ion-implanting a p-type impurity, n-type impurity, or carbon (C) to the SiC layer before the first thermal treatment.

3 . The method according to claim 1 , wherein a temperature in the first thermal treatment is 1000° C. or higher and lower than 1600° C.

4 . The method according to claim 2 , further comprising applying, before the first thermal treatment, a second thermal treatment to anneal the SiC layer at a temperature higher than a temperature in the first thermal treatment after the ion-implanting.

5 . The method according to claim 1 , wherein the gas including carbon (C) is a gas of hydrocarbon.

6 . The method according to claim 4 , wherein the temperature in the second thermal treatment is 1600° C. or more and 1800° C. or less.

7 . The method according to claim 5 , wherein the hydrocarbon is methane, propane, or acetylene.

8 . The method according to claim 2 , wherein a dose amount in the ion-implanting is 1×10 15 cm −2 or more.

9 . The method according to claim 1 , further comprising forming the SiC layer on an SiC substrate by an epitaxial growth method before the first thermal treatment.

10 . The method according to claim 2 , wherein an ion of the n-type impurity or the p-type impurity is selectively implanted into the SiC layer at the ion-implanting.

11 . A semiconductor device, comprising:
an SiC substrate having a first surface and a second surface; a first conductivity type SiC layer disposed on the first surface side of the SiC substrate, the SiC layer including a low level density region having Z 1/2 level density of 1×10 11 cm −3 or less measured by deep level transient spectroscopy (DLTS); a second conductivity type SiC region disposed on a surface of the SiC layer; a first electrode disposed on the SiC region; and a second electrode disposed on the second surface side of the SiC substrate.

12 . The device according to claim 11 , wherein the low level density region is located in a range of 0.3 μm or less from an interface between the SiC layer and the SiC region on the SiC substrate side.

13 . A semiconductor device, comprising:
an SiC substrate having a first surface and a second surface; a first conductivity type SiC layer disposed on a first surface side of the SiC substrate; a second conductivity type first SiC region disposed on a surface of the SiC layer, and including a low level density region having Z 1/2 level density of 1×10 11 cm −3 or less measured by deep level transient spectroscopy (DLTS); a first conductivity type second SiC region disposed on a surface of the first SiC region; a gate insulating film formed on surfaces of the SiC layer and the first SiC region; a gate electrode disposed on the gate insulating film; a first electrode disposed on the second SiC region; and a second electrode disposed on a second surface side of the SiC substrate.

14 . The device according to claim 13 , wherein the low level density region is located in a range of 0.3 μm or less from an interface between the first SiC region and the gate insulating film on the SiC substrate side.

15 . The device according to claim 13 , wherein the SiC substrate is the first conductivity type.

16 . The device according to claim 13 , wherein the SiC substrate is the second conductivity type.

Assignees

• Toshiba Kk

Inventors

• Nishio Johji
• Shimizu Tatsuo
• Shinohe Takashi

Classifications

• H10P30/2042

  into crystalline silicon carbide · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10P14/3408

  Silicon carbide · CPC title

• H10P14/2926

  Crystal orientations · CPC title

• H10P14/2904

  Silicon carbide · CPC title