Nonvolatile storage device and operating system (os) image program method thereof

Patent metadata

Field	Value
Publication number	US-2016004470-A1
Application number	US-201514856045-A
Country	US
Kind code	A1
Filing date	Sep 16, 2015
Priority date	Mar 15, 2013
Publication date	Jan 7, 2016
Grant date	—

Abstract

A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.

First claim

1 - 20 . (canceled)

21 . A nonvolatile storage device comprising:
a nonvolatile memory including a first memory area and a second memory area, each memory area including a plurality of memory cells, each memory cell being configurable to operate one of high data reliability mode and low data reliability mode, the first memory area operating in the high data reliability mode and the second memory area operating in the low data reliability mode; and a memory controller including, a first register configured to store reliable mode information indicating whether to support a reliable mode or not, and a second register configured to store pre-soldering data information, a third register configured to store an activating information of the reliable mode, wherein the memory controller is configured to, receive the pre-soldering data information from a host and store the pre-soldering data information into the second register, receive a write command with pre-soldering data from the host, activate the reliable mode by set a first value in the third register, write the pre-soldering data into the first memory area, and block data migration of the pre-soldering data from the first memory area to the second memory area while the activating information of the reliable mode indicates that the reliable mode is being activated, wherein a number of storage bits per cell of memory cells in the first memory area is smaller than a number of storage bits per cell of memory cells in the second memory area.

22 . The nonvolatile storage device of claim 21 , wherein the pre-soldering data includes an operating system OS image.

23 . The nonvolatile storage device of claim 21 , wherein the first register is a vendor specific register.

24 . The nonvolatile storage device of claim 21 , wherein the pre-soldering data information includes a size of the pre-soldering data indicated by at least one of a sector start address and a sector counter.

25 . The nonvolatile storage device of claim 21 , wherein the memory controller activates the reliable mode after storing the pre-soldering data information in the second register.

26 . The nonvolatile storage device of claim 21 , wherein the memory controller further configured to deactivate the reliable mode by set a second value in the third register.

27 . The nonvolatile storage device of claim 26 , wherein the memory controller deactivates the reliable mode after the pre-soldering data is written to the first memory area.

28 . The nonvolatile storage device of claim 27 , wherein the pre-soldering data is being able to migrate from the first memory area to the second memory area when the activating information of the reliable mode indicates that the reliable mode is being deactivated.

29 . A method of programming pre-soldering data in a nonvolatile storage device including a nonvolatile memory and a memory controller, the nonvolatile storage device being mounted on a printed circuit board, the method comprising:
wherein the memory controller includes a first register storing a value indicating whether the nonvolatile storage device supports a reliable mode or not, writing pre-soldering data information in a second register in the memory controller; activating the reliable mode by writing a first value in a third register in the memory controller; programming the pre-soldering data into a first storage area of the nonvolatile memory while the reliable mode is being activated; and deactivating the reliable mode after completing program the pre-soldering data into the first storage area, wherein the nonvolatile memory includes the first storage area and a second storage area, a number of storage bits stored in each memory cell of the first storage area is smaller than a number of storage bits stored in each memory cell of the second memory area, wherein while the reliable mode is being activated, a migration of the pre-soldering data from the first storage area to the second storage area is blocked, wherein the number of data bits stored in each memory cell of the first storage area is one or more than one.

30 . The method of claim 29 , wherein after deactivating the reliable mode, the migration of the pre-soldering data from the first storage area to a second storage area is enabled.

31 . The method of claim 29 , wherein the first register is a vendor specific register of the nonvolatile storage device.

32 . The method of claim 29 , further comprises:
applying a surface mount technology (SMT) to mount the nonvolatile storage device on the printed circuit board.

33 . The method of claim 32 , wherein the surface mount technology (SMT) is applied after deactivating the reliable mode is performed.

34 . The method of claim 29 , wherein the pre-soldering data includes an operation system OS image.

35 . The method of claim 29 , wherein the reliable mode is deactivated by writing a second value in the third register.

36 . The method of claim 29 , wherein the first storage area is configured to store 1-bit per cell and the second storage area is configured to store 3-bit per cell.

37 . The method of claim 29 , wherein the deactivating the reliable mode includes an auto mode and a passive mode.

38 . The method of claim 37 , wherein while the auto mode of the deactivating the reliable mode, deactivation of the reliable mode is performed automatically in the nonvolatile storage device without intervention from an external.

39 . The method of claim 37 , wherein while the passive mode of deactivating the reliable mode, deactivation of the reliable is performed in response to an external command.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Cho Sung-Hyun
• Kim Dongin
• Park Junseok
• Lee Taemin
• Lim Chaesuk

Classifications

• G06F8/63

  Image based installation; Cloning; Build to order · CPC title

• G06F3/0619 Primary

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0647

  Migration mechanisms · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title

• G06F3/0617

  in relation to availability · CPC title