Metal oxide tft stability improvement

US2015380561A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2015380561-A1
Application numberUS-201414765528-A
CountryUS
Kind codeA1
Filing dateFeb 5, 2014
Priority dateMar 1, 2013
Publication dateDec 31, 2015
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A metal oxide thin film transistor incorporating reduced hydrogen silicon-containing layers and methods of making the same are disclosed herein. The thin film transistor can include a substrate, a metal oxide semiconductor layer, a substantially hydrogen free channel interface layer and a cap layer comprising silicon formed over the channel interface layer. The method for making a thin film transistor can include depositing a metal oxide semiconductor layer over a substrate, activating a deposition gas comprising SiF 4 to create an activated deposition gas, delivering the activated deposition gas to the substrate to deposit a channel interface layer comprising SiOF and depositing a cap layer over the channel interface layer and the metal oxide thin film transistor layer.

First claim

Opening claim text (preview).

1 . A thin film transistor comprising: a substrate having a first surface; a metal oxide semiconductor layer formed over a portion of the first surface of the substrate; a channel interface layer in contact with the metal oxide semiconductor layer, the channel interface layer comprising silicon oxyfluoride (SiOF), wherein the channel interface layer comprises less than 1 atomic percent hydrogen; and a cap layer formed over the channel interface layer, the cap layer comprising silicon. 2 . The thin film transistor of claim 1 , wherein the cap layer comprises of silicon nitride or silicon oxide. 3 . The thin film transistor of claim 2 , wherein the cap layer comprises of silicon nitride and contains less than 16 atomic percent hydrogen. 4 . The thin film transistor of claim 1 , wherein the hydrogen content of the cap layer is not greater than 1 atomic percent. 5 . The thin film transistor of claim 1 , wherein the channel interface layer comprises more than one layer, and wherein at least one layer of the channel interface comprises SiOF. 6 . The thin film transistor of claim 1 , wherein each of the channel interface layer and the cap layer are between 20 Å and 3000 Å. 7 . The thin film transistor of claim 1 , wherein the cap layer comprises of two or more layers. 8 . The thin film transistor of claim 1 , wherein the metal oxide semiconductor layer is deposited over a gate dielectric layer, the gate dielectric layer consisting of SiOF. 9 . A method for making a thin film transistor comprising: positioning a substrate in a processing chamber; depositing a metal oxide semiconductor layer over a portion of the surface of the substrate, the metal oxide semiconductor layer comprising zinc oxide; activating a deposition gas to create an activated deposition gas, the deposition gas comprising SiF 4 ; delivering the activated deposition gas to the substrate to deposit a channel interface layer over the metal oxide semiconductor layer, wherein the channel interface layer contains less than 1 atomic percent hydrogen; and depositing a cap layer over the channel interface layer and the metal oxide semiconductor layer. 10 . The method of claim 9 , wherein the channel interface layer is deposited at temperatures less than 250 degrees Celsius. 11 . The method of claim 9 , wherein the cap layer is deposited using a deposition gas mixture comprising SiH 4 , O 2 , N 2 O or combinations thereof. 12 . The method of claim 9 , wherein the cap layer is deposited using a deposition gas mixture comprising SiH 4 , SiF 4 , NH 3 , N 2 , H 2 or combinations thereof. 13 . The method of claim 9 , wherein the channel interface layer comprises less than 1 atomic percent hydrogen. 14 . The method of claim 9 , wherein the cap layer comprises silicon nitride or silicon oxide. 15 . The method of claim 9 , further comprising depositing a gate dielectric layer over the substrate, the gate dielectric layer comprising SiOF. 16 . The method of claim 9 , wherein the channel interface layer is deposited using a deposition gas mixture comprising SiF 4 , O 2 , N 2 O or combinations thereof. 17 . The method of claim 9 , wherein the cap layer is deposited using microwave PECVD. 18 . A thin film transistor comprising: a substrate having a first surface; a gate electrode formed over the first surface; a gate dielectric layer formed over the gate electrode, the gate dielectric layer comprising SiOF; a metal oxide semiconductor layer formed over the gate dielectric layer, the metal oxide semiconductor layer comprising zinc oxide; a channel interface layer in contact with the metal oxide semiconductor layer, the channel interface layer comprising silicon oxyfluoride (SiOF), wherein the channel interface layer comprises less than 1 atomic percent hydrogen; and a cap layer formed over the channel interface layer, the cap layer comprising silicon nitride or silicon oxide. 19 . The thin film transistor of claim 18 , wherein the cap layer comprises of silicon nitride and contains less than 16 atomic percent hydrogen. 20 . The thin film transistor of claim 18 , wherein each of the channel interface layer and the cap layer are between 20 Å and 3000 Å.

Assignees

Inventors

Classifications

  • the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • Oxides · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

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What does patent US2015380561A1 cover?
A metal oxide thin film transistor incorporating reduced hydrogen silicon-containing layers and methods of making the same are disclosed herein. The thin film transistor can include a substrate, a metal oxide semiconductor layer, a substantially hydrogen free channel interface layer and a cap layer comprising silicon formed over the channel interface layer. The method for making a thin film tra…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).