Liquid crystal display panel

US2015241726A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2015241726-A1
Application numberUS-201514710313-A
CountryUS
Kind codeA1
Filing dateMay 12, 2015
Priority dateAug 6, 2012
Publication dateAug 27, 2015
Grant date

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to one embodiment, a liquid crystal display panel includes an array substrate, a counter-substrate, a liquid crystal layer and a columnar spacer. The array substrate includes a wiring including projection portion which form a dot pattern with light-blocking properties, and a first horizontal alignment film. The counter-substrate includes a second horizontal alignment film. The columnar spacer is disposed between the array substrate and the counter-substrate and is located within the dot pattern.

First claim

Opening claim text (preview).

1 - 20 . (canceled) 21 . A liquid crystal display panel comprising: an array substrate comprising a first wiring including a first projection portion, and a second wiring which is perpendicular to the first wiring; a counter-substrate comprising a first belt portion extending in a belt shape in parallel to the first wiring and overlapping the first wiring, and a second belt portion extending in a belt shape in parallel to the second wiring and overlapping the second wiring; and a liquid crystal layer held between the array substrate and the counter-substrate, wherein at least a part of the first projection portion is located with a displacement from the first belt portion, and is opposed to the second wiring. 22 . The liquid crystal display panel of claim 21 , wherein the array substrate further comprises a third wiring which is perpendicular to the first wiring, the counter-substrate further comprises a third belt portion extending in a belt shape in parallel to the third wiring and overlapping the third wiring, the first wiring further includes a second projection portion, at least a part of the second projection portion is located with a displacement from the first belt portion, and is opposed to the third wiring, and both the first projection portion and the second projection portion are protruded from a first edge of the first belt portion to an outside of the first belt portion. 23 . The liquid crystal display panel of claim 21 , wherein the first wiring further includes a second projection portion, at least a part of the second projection portion is located with a displacement from the first belt portion, and is opposed to the second wiring, the first projection portion is protruded from a first edge of the first belt portion to an outside of the first belt portion, and the second projection portion is protruded from a second edge of the first belt portion to the outside of the first belt portion. 24 . The liquid crystal display panel of claim 21 , wherein the array substrate further comprises an insulation film which is provided between the first wiring and the second wiring. 25 . The liquid crystal display panel of claim 21 , wherein the second wiring further includes a third projection portion, and at least a part of the third projection portion is opposed to the first wiring. 26 . The liquid crystal display panel of claim 21 , wherein a shape of the first projection portion is semicircular, triangular, or rectangular. 27 . The liquid crystal display panel of claim 21 , wherein the first wiring is either one of a gate line and a storage capacitance line, and the second wiring is a signal line. 28 . The liquid crystal display panel of claim 21 , wherein the first wiring is a signal line, and the second wiring is either one of a gate line and a storage capacitance line. 29 . A liquid crystal display panel comprising: an array substrate comprising a first wiring including a first projection portion, and a second wiring which is perpendicular to the first wiring; a counter-substrate comprising a first belt portion extending in a belt shape in parallel to the first wiring and overlapping the first wiring, and a second belt portion extending in a belt shape in parallel to the second wiring and overlapping the second wiring; a liquid crystal layer held between the array substrate and the counter-substrate; and a spacer disposed between the array substrate and the counter-substrate, wherein at least a part of the spacer is opposed to an intersection part between the first belt portion and the second belt portion, and at least a part of the first projection portion is located with a displacement from the first belt portion, and is opposed to the second wiring. 30 . The liquid crystal display panel of claim 29 , wherein the array substrate further comprises a third wiring which is perpendicular to the first wiring, the counter-substrate further comprises a third belt portion extending in a belt shape in parallel to the third wiring and overlapping the third wiring, the first wiring further includes a second projection portion, at least a part of the second projection portion is located with a displacement from the first belt portion, and is opposed to the third wiring, and both the first projection portion and the second projection portion are protruded from a first edge of the first belt portion to an outside of the first belt portion. 31 . The liquid crystal display panel of claim 29 , wherein the first wiring further includes a second projection portion, at least a part of the second projection portion is located with a displacement from the first belt portion, and is opposed to the second wiring, the first projection portion is protruded from a first edge of the first belt portion to an outside of the first belt portion, and the second projection portion is protruded from a second edge of the first belt portion to the outside of the first belt portion. 32 . The liquid crystal display panel of claim 29 , wherein the array substrate further comprises an insulation film which is provided between the first wiring and the second wiring. 33 . The liquid crystal display panel of claim 29 , wherein the second wiring further includes a third projection portion, and at least a part of the third projection portion is opposed to the first wiring. 34 . The liquid crystal display panel of claim 29 , wherein a shape of the first projection portion is semicircular, triangular, or rectangular. 35 . The liquid crystal display panel of claim 29 , wherein the first wiring is either one of a gate line and a storage capacitance line, and the second wiring is a signal line. 36 . The liquid crystal display panel of claim 29 , wherein the first wiring is a signal line, and the second wiring is either one of a gate line and a storage capacitance line.

Assignees

Inventors

Classifications

  • Wiring, e.g. gate line, drain line · CPC title

  • spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title

  • Physics · mapped topic

  • Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

  • for homogeneous alignment · CPC title

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Frequently asked questions

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What does patent US2015241726A1 cover?
According to one embodiment, a liquid crystal display panel includes an array substrate, a counter-substrate, a liquid crystal layer and a columnar spacer. The array substrate includes a wiring including projection portion which form a dot pattern with light-blocking properties, and a first horizontal alignment film. The counter-substrate includes a second horizontal alignment film. The columna…
Who is the assignee on this patent?
Japan Display Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/13394. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).