Testing integrated circuit designs containing multiple phase rotators

Patent metadata

Field	Value
Publication number	US-2015198661-A1
Application number	US-201414155937-A
Country	US
Kind code	A1
Filing date	Jan 15, 2014
Priority date	Jan 15, 2014
Publication date	Jul 16, 2015
Grant date	—

Abstract

Approaches for testing phase rotators are provided. A circuit for testing phase rotators includes a compare element including a first input and a second input, wherein the compare element is configured to compare a first phase of a first signal provided at the first input to a second phase of a second signal provided at the second input. The circuit also includes a first test bus connected to the first input and a second test bus connected to the second input.

First claim

What is claimed is:

1 . A circuit for testing phase rotators, comprising:
a compare element including a first input and a second input, wherein the compare element is configured to compare a first phase of a first signal provided at the first input to a second phase of a second signal provided at the second input; a first test bus connected to the first input; and a second test bus connected to the second input.

2 . The circuit of claim 1 , wherein the compare element comprises tunable logic.

3 . The circuit of claim 1 , wherein the compare element comprises a tunable AND gate.

4 . The circuit of claim 1 , wherein the compare element comprises a phase detector.

5 . The circuit of claim 1 , wherein:
a first subset of the plurality of phase rotators are associated with and selectively connectable to the first test bus; and a second subset of the plurality of phase rotators are associated with and selectively connectable to the second test bus.

6 . The circuit of claim 1 , wherein:
a single one of the plurality of phase rotators is selectively connectable to the first test bus; and all other ones of the plurality of phase rotators, other than the single one, are selectively connectable to the second test bus.

7 . The circuit of claim 1 , wherein a phase source that is separate from the plurality of phase rotators is selectively connectable to the first test bus.

8 . The circuit of claim 7 , wherein the phase source comprises an output of a phase locked loop (PLL).

9 . The circuit of claim 8 , further comprising a test phase rotator in a feedback loop of the PLL.

10 . The circuit of claim 1 , wherein an output of the compare element is a function a phase relationship between the first phase and the second phase.

11 . A system for testing phase rotators, comprising:
a first test bus connected to a first input of a compare element; a second test bus connected to a second input of the compare element; and a control circuit configured to:
selectively connect a first phase source to the first test bus;
selectively connect a second phase source comprising an output of one of a plurality of phase rotators to the second test bus;
store an output of the compare element; and
provide inputs to the plurality of phase rotators.

12 . The system of claim 11 , wherein the control circuit comprises a built-in-self-test (BIST) structure.

13 . The system of claim 11 , wherein the control circuit is configured to provide one of control signals and tuning signals to the compare element.

14 . The system of claim 11 , wherein the inputs provided to the plurality of phase rotators by the control unit include phase and weight settings.

15 . The system of claim 11 , wherein the output of the compare element is a function a phase relationship between the first phase source and the second phase source.

16 . The system of claim 15 , further comprising logic configured to compare the output of the compare element to a predetermined expected phase relationship between the first phase source and the second phase source.

17 . A method of testing phase rotators, comprising:
connecting a first phase source to a first input of a compare element; connecting a second phase source to a second input of a compare element, wherein the second phase source comprises an output of one a plurality of phase rotators that are selectively connectable to the second input; generating an expected value of a phase relationship between the first phase source and the second phase source; and comparing the expected value to an output of the compare element.

18 . The method of claim 17 , wherein the first phase source comprises one of:
an output of another one of the plurality of phase rotators; and an output of a phase locked loop.

19 . The method of claim 17 , further comprising:
selecting at least one of a first phase and a first weight for the first phase source; and selecting at least one of a second phase and a second weight for the second phase source.

20 . The method of claim 17 , further comprising repeating the connecting the second phase source, the generating, and the comparing for each one of the plurality of phase rotators.

Assignees

• IBM

Inventors

• Gerowitz Robert G
• Higgins Sarah B
• Iadanza Joseph A

Classifications

• H04L7/033

  using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop · CPC title

• H04L7/042

  Detectors therefor, e.g. correlators, state machines (digital correlators in general G06F17/15) · CPC title

• G01R31/31703

  Comparison aspects, e.g. signature analysis, comparators (concerning scan tests G01R31/318566; concerning testers G01R31/3193) · CPC title

• G01R29/18

  Indicating phase sequence; Indicating synchronism · CPC title

• G01R31/31707

  Test strategies (methods for generation of test sequences G01R31/318371) · CPC title