Switched-mode power converter with split partitioning

US2015171748A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2015171748-A1
Application numberUS-201314108096-A
CountryUS
Kind codeA1
Filing dateDec 16, 2013
Priority dateDec 16, 2013
Publication dateJun 18, 2015
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A power converter is described that includes components arranged within a first die and a second die of a single package. The first die includes one or more first switches coupled to a switching node of a power stage. The second die includes one or more second switches coupled to the switching node of the power stage, a feedback control unit configured to detect a current level at the one or more second switches of the power stage, and a controller unit configured to control the one or more first switches and the one or more second switches of the power stage based at least in part on the current level detected by the feedback control unit.

First claim

Opening claim text (preview).

What is claimed is: 1 . A power converter comprising: a first die including one or more first switches coupled to a switching node of a power stage; and a second die including: one or more second switches coupled to the switching node of the power stage, and a controller unit configured to control the one or more first switches and the one or more second switches of the power stage to produce a power output at the switching node of the power stage. 2 . The power converter of claim 1 , wherein the one or more first switches comprise one or more high-side switches of a half-bridge of the power stage and the one or more second switches comprise one or more low-side switches of the half-bridge of the power stage. 3 . The power converter of claim 1 , wherein the one or more second switches comprise one or more high-side switches of a half-bridge of the power stage and the one or more first switches comprise one or more low-side switches of the half-bridge of the power stage. 4 . The power converter of claim 1 , wherein the second die further includes a feedback control unit configured to detect a current level at the one or more second switches of the power stage, wherein the controller unit is further configured to control the one or more first switches and the one or more second switches of the power stage based at least in part on the current level detected by the feedback control unit. 5 . The power converter of claim 4 , wherein the feedback control unit is further configured to detect the current level at the one or more second switches based on a sense-FET current sensing signal. 6 . The power converter of claim 5 , wherein the second die further includes: one or more sense lines contained to the second die that couple the feedback control unit to the one or more second switches of the power stage, the one or more sense lines being configured to transmit information associated with a current or voltage level of the power stage to the feedback control unit. 7 . The power converter of claim 6 , wherein the one or more sense lines are further configured to transmit a sense-FET current sensing signal associated with a current level detected at the one or more second switches to the feedback control unit 8 . The power converter of claim 4 , wherein the feedback control unit is further configured to detect a voltage or current level of a power output of the power converter, and wherein the controller unit is further configured to control the one or more first switches and the one or more second switches of the power stage based at least in part on the voltage or current level of the power output detected by the feedback control unit. 9 . The power converter of claim 1 , wherein the first die is a FET or SFET type die. 10 . The power converter of claim 1 , wherein the one or more first switches are SFET type switches. 11 . The power converter of claim 1 , wherein the second die is a CMOS type die. 12 . The power converter of claim 1 , wherein the one or more second switches are CMOS type switches. 13 . The power converter of claim 1 , wherein the second die further includes at least one first driver configured to control the one or more first switches and at least one second driver further configured to control the one or more second switches. 14 . The power converter of claim 1 , wherein the power converter comprises a step-down converter, wherein the power output comprises at a first voltage level that does not exceed a second voltage level of a power input received at the half bridge. 15 . The power converter of claim 1 , wherein the power converter comprises a step-up converter, wherein the power output comprises a first voltage level that meets or exceeds a second voltage level of a power input received at the half bridge. 16 . The power converter of claim 1 , wherein the controller unit is further configured to output at least one of a pulse-density-modulation signal, a pulse width modulation signal, and a pulse frequency modulation signal for controlling the one or more first switches and the one or more second switches of the power stage. 17 . The power converter of claim 1 , wherein the power stage comprises a single phase half-bridge, wherein the one or more first switches comprise a single high-side switch of the single phase half-bridge and the one or more second switches comprise a single low-side switch of the single phase half-bridge. 18 . The power converter of claim 1 , wherein the power stage comprises a multiple phase half-bridge, wherein the one or more first switches comprise two or more high-side switches of the multiple phase half-bridge and the one or more second switches comprise two or more low-side switches of the multiple phase half-bridge. 19 . A method comprising: detecting, by a feedback control unit at a second die of a power converter, a current level at one or more second switches at the second die of the power converter, the one or more second switches being coupled to one or more first switches at a first die of the power converter at a switching node of a power stage; controlling, by a controller unit at the second die, the one or more first switches of the power stage at the first die based at least in part on a driver signal, wherein the driver signal is based at least in part on the current level detected at the one or more second switches at the second die; and controlling, by the controller unit at the second die, the one or more second switches of the power stage at the second die based at least in part on the driver signal. 20 . A power converter comprising: means for detecting a current level at one or more second switches at a second die of a power converter, the one or more second switches being coupled to one or more first switches at a first die of the power converter at a switching node of a power stage; means for controlling, from the second die, the one or more first switches of the power stage at the first die based at least in part on a driver signal, wherein the driver signal is based at least in part on the current level detected at the one or more second switches at the second die; and means for controlling, from the second die, the one or more second switches of the power stage at the second die based at least in part on the driver signal.

Assignees

Inventors

Classifications

  • Configurations of laterally-adjacent chips · CPC title

  • On different surfaces · CPC title

  • Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • H02M3/158Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

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What does patent US2015171748A1 cover?
A power converter is described that includes components arranged within a first die and a second die of a single package. The first die includes one or more first switches coupled to a switching node of a power stage. The second die includes one or more second switches coupled to the switching node of the power stage, a feedback control unit configured to detect a current level at the one or mo…
Who is the assignee on this patent?
Infineon Technologies Austria
What technology area does this patent fall under?
Primary CPC classification H02M3/158. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).