Complementarily strained finfet structure

US2015144962A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2015144962-A1
Application numberUS-201414322207-A
CountryUS
Kind codeA1
Filing dateJul 2, 2014
Priority dateNov 25, 2013
Publication dateMay 28, 2015
Grant date

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Abstract

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A complementary fin field-effect transistor (FinFET) includes a p-type device having a p-channel fin. The p-channel fin may include a first material that is lattice mismatched relative to a semiconductor substrate. The first material may have a compressive strain. The FinFET device also includes an n-type device having an re-channel fin. The n-channel fin may include a second material having a tensile strain that is lattice mismatched relative to the semiconductor substrate. The p-type device and the n-type device cooperate to form the complementary FinFET device.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for fabricating a complementary fin field effect transistor (FinFET) device on a semiconductor substrate, comprising: processing a first material having a compressive strain to fabricate a p-type fin device on the semiconductor substrate; and processing a second material having a tensile strain to fabricate an n-type fin device on the semiconductor substrate, in which the p-type fin device and the n-type fin device cooperate to form the complementary FinFET device. 2 . The method of claim 1 , in which the compressive strain is along a length of the p-type fin device. 3 . The method of claim 1 , in which the tensile strain is along a length of the n-type fin device. 4 . The method of claim 1 , in which the semiconductor substrate is a silicon substrate. 5 . The method of claim 1 , in which the first material is at least one of silicon-germanium (SiGe), germanium (Ge), and/or silicon-germanium carbon (SiGe:C). 6 . The method of claim 1 , in which the second material is silicon-carbon (Si:C). 7 . The method of claim 1 , in which the semiconductor substrate comprises an oxide layer, a nitride layer, a metal oxide layer or a silicon layer. 8 . The method of claim 1 , further comprising integrating the complementary FinFET device into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit. 9 . A complementary fin field-effect transistor (FinFET) device, comprising: a p-type device having a p-channel fin comprising a first material that is lattice mismatched relative to a semiconductor substrate, the first material having a compressive strain; and an n-type device having an n-channel fin comprising a second material having a tensile strain and being lattice mismatched relative to the semiconductor substrate, in which the p-type device and the n-type device cooperate to form the complementary FinFET device. 10 . The complementary FinFET device of claim 9 , in which the compressive strain is along a length of the p-channel fin. 11 . The complementary FinFET device of claim 9 , in which the tensile strain is along a length of the n-channel fin. 12 . The complementary FinFET device of claim 9 , in which the first material is at least one of silicon-germanium (SiGe), germanium (Ge), and/or silicon-germanium carbon (SiGe:C). 13 . The complementary FinFET device of claim 9 , in which the second material is silicon-carbon (Si:C). 14 . The complementary FinFET device of claim 9 , in which the semiconductor substrate comprises a silicon substrate. 15 . The complementary FinFET device of claim 9 , in which the semiconductor substrate comprises an oxide layer, a nitride layer, a metal oxide layer or a silicon layer. 16 . The complementary FinFET device of claim 9 integrated into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit. 17 . A method for fabricating a complementary fin field effect transistor (FinFET) device on a semiconductor substrate, comprising: the step for fabricating a p-type device having a p-channel fin comprising a first material having a compressive strain and being lattice mismatched relative to the semiconductor substrate; and the step for fabricating an n-type device having an n-channel fin comprising a second material having a tensile strain and being lattice mismatched relative to the semiconductor substrate, in which the p-type device and the n-type device cooperate to form the complementary FinFET device. 18 . The method of claim 17 , in which the complementary FinFET device is integrated into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit. 19 . A complementary fin field-effect transistor (FinFET) device, comprising: a p-type device having means for carrying current comprising a first material that is lattice mismatched relative to a semiconductor substrate, the first material having a compressive strain; and an n-type device having means for carrying current comprising a second material having a tensile strain and being lattice mismatched relative to the semiconductor substrate, in which the p-type device and the n-type device cooperate to form the complementary FinFET device. 20 . The complementary FinFET device of claim 19 , integrated into a mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation device, a computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and/or a fixed location data unit.

Assignees

Inventors

Classifications

  • the components including FinFETs · CPC title

  • using silicon technology, e.g. SiGe · CPC title

  • Silicon carbide · CPC title

  • being Group IV materials comprising two or more elements, e.g. SiGe · CPC title

  • having composition variations in the channel regions · CPC title

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What does patent US2015144962A1 cover?
A complementary fin field-effect transistor (FinFET) includes a p-type device having a p-channel fin. The p-channel fin may include a first material that is lattice mismatched relative to a semiconductor substrate. The first material may have a compressive strain. The FinFET device also includes an n-type device having an re-channel fin. The n-channel fin may include a second material having a …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H10D84/853. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 28 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).