Method and system using a battery voltage loop under high-current conditions

Patent metadata

Field	Value
Publication number	US-12597796-B2
Application number	US-202218077039-A
Country	US
Kind code	B2
Filing date	Dec 7, 2022
Priority date	Jul 8, 2022
Publication date	Apr 7, 2026
Grant date	Apr 7, 2026

Abstract

Systems and methods for using a battery voltage loop under high-current conditions are described. A method for operating a charger, the method includes setting, by a charger controller, a battery voltage threshold; setting, by the charger controller, an on-the-go (OTG) voltage threshold; computing, by a first comparator, a battery voltage error based on a difference between a battery voltage and the battery voltage threshold; computing, by a second comparator, an OTG voltage error based on a difference between an OTG voltage and the OTG voltage threshold; and selecting, by a loop selector, a battery voltage loop when the battery voltage error is smaller than the OTG voltage error.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a charger comprising a charger controller and a power stage, the power stage having a power stage first side and a power stage second side, the power stage first side configured to connect to a voltage-sensitive component, the power stage second side configured to connect to a load; and a battery monitor coupled to the charger, the battery monitor configured to receive power from a battery and to conduct power from the battery to the power stage first side and the voltage-sensitive component at a system voltage, the battery monitor configured to provide a battery voltage to the charger controller, the battery voltage being related to the system voltage, the power stage second side configured to provide power to the load at an on-the-go (OTG) voltage, wherein the charger controller includes a first comparator configured to compare the battery voltage to a battery voltage threshold and compute a battery voltage error, wherein the charger controller includes a second comparator configured to compare the OTG voltage to an OTG voltage threshold and compute an OTG voltage error, and wherein the charger controller is configured to disable driving the power stage second side to the load when the battery voltage error is less than the OTG voltage error.

2 . The semiconductor device of claim 1 , wherein the charger controller includes a pulse width modulation control module configured to control at least one pulse width modulator configured to drive the power stage second side when enabled.

3 . The semiconductor device of claim 1 , wherein the charger controller enables driving the power stage second side to the load when the battery voltage error is greater than or equal to the OTG voltage error.

4 . The semiconductor device of claim 1 , wherein the power stage is a buck-boost power stage, the charger comprising a buck-boost charger.

5 . The semiconductor device of claim 1 , wherein the power stage is a buck power stage, the charger comprising a buck charger.

6 . The semiconductor device of claim 1 , wherein the battery monitor includes a voltage divider disposed between the battery and the power stage first side.

7 . The semiconductor device of claim 1 , wherein the voltage-sensitive component includes a power on reset module having a power on reset threshold.

8 . The semiconductor device of claim 7 , wherein the voltage-sensitive component is a microcontroller unit.

9 . A semiconductor system, comprising:
a voltage-sensitive component; a charger comprising a charger controller and a power stage, the power stage having a power stage first side and a power stage second side, the power stage first side configured to connect to a voltage-sensitive component, the power stage second side configured to connect to a load; a battery; and a battery monitor coupled to the charger, the battery, and the voltage-sensitive component, the battery monitor configured to receive power from the battery and conducting power from the battery to the power stage first side at a system voltage, the battery monitor configured to provide a battery voltage to the charger controller, the battery voltage being related to the system voltage, the power stage second side configured to provide power to the load at an on-the-go (OTG) voltage, wherein the charger controller includes a first comparator configured to compare the battery voltage to a battery voltage threshold and compute a battery voltage error, wherein the charger controller includes a second comparator configured to compare the OTG voltage to a load voltage threshold and compute an OTG voltage error, and wherein the charger controller is configured to disable driving the power stage second side to the load when the battery voltage error is less than the OTG voltage error.

10 . The semiconductor system of claim 9 , wherein the charger controller includes a pulse width modulation control module configured to control at least one pulse width modulator configured to drive the power stage second side when enabled.

11 . The semiconductor system of claim 9 , wherein the charger controller enables driving the power stage second side to the load when the battery voltage error is greater than or equal to the OTG voltage error.

12 . The semiconductor system of claim 9 , wherein the power stage is a buck-boost power stage, the charger comprising a buck-boost charger.

13 . A method for operating a charger, the method comprising:
setting, by a charger controller, a battery voltage threshold; setting, by the charger controller, an on-the-go (OTG) voltage threshold; computing, by a first comparator, a battery voltage error based on a difference between a battery voltage and the battery voltage threshold; computing, by a second comparator, an OTG voltage error based on a difference between an OTG voltage and the OTG voltage threshold; and selecting, by a loop selector, a battery voltage loop when the battery voltage error is smaller than the OTG voltage error.

14 . The method of claim 13 , the method further comprising:
disabling, by the charger, power delivery through a power stage to a load when the battery voltage loop is selected.

15 . The method of claim 14 , the method further comprising:
sustaining, by a battery monitor, power to a voltage-sensitive component when the battery voltage loop is selected.

16 . The method of claim 15 , wherein the battery voltage threshold is higher than a power on reset threshold for the voltage-sensitive component.

17 . The method of claim 15 , wherein the voltage-sensitive component is a microcontroller unit.

18 . The method of claim 13 , the method further comprising:
selecting, by a loop selector, an OTG voltage loop when the battery voltage error is greater than or equal to the OTG voltage error; and enabling, by the charger, power delivery through a power stage to a load when the OTG voltage loop is selected.

19 . The method of claim 18 , the method further comprising:
regulating, by the charger, power delivery through a power stage to a load when the OTG voltage loop is selected.

20 . The method of claim 19 , wherein the power stage is a buck-boost power stage, the charger comprising a buck-boost charger.

Assignees

• Renesas Electronics America Inc

Inventors

• Lim Sungkeun
• Chen Yen-Mo
• Li Bin

Classifications

• H02J7/927 Primary

  with introduction of pulses during the charging process · CPC title

• H02J7/80

  including monitoring or indicating arrangements · CPC title

• H02J7/96 Primary

  in response to battery voltage · CPC title

• H02J7/00711

  Electricity · mapped topic

• H02J7/0047

  Electricity · mapped topic