Storage apparatus, maintenance support method, and maintenance support program
US-2022236882-A1 · Jul 28, 2022 · US
Information processing system and information processing method
US12596483B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12596483-B2 |
| Application number | US-202418987300-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2024 |
| Priority date | Dec 26, 2023 |
| Publication date | Apr 7, 2026 |
| Grant date | Apr 7, 2026 |
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Abstract
Official abstract text for this publication.
An information processing system includes: an application adder that obtain an estimated writing amount that is estimated to be written to a non-volatile memory by an application per unit time; and the application adder, a monitor, and a controller that suppress writing to the non-volatile memory by the application based on the estimated writing amount.
First claim
Opening claim text (preview).
The invention claimed is: 1 . An information processing system comprising: a memory; and a processor connected to the memory, wherein, using the memory, the processor: obtains an estimated writing amount that is an estimated amount of data to be written to a non-volatile memory by an application per unit time; and suppresses writing to the non-volatile memory by the application based on the estimated writing amount. 2 . The information processing system according to claim 1 , wherein the processor obtains the estimated writing amount when the application is installed in the information processing system. 3 . The information processing system according to claim 1 , wherein when a writing amount that is an amount of data written to the non-volatile memory by the application per unit time is greater than the estimated writing amount, the processor suppresses the writing. 4 . The information processing system according to claim 3 , wherein the processor suppresses the writing by prohibiting the writing. 5 . The information processing system according to claim 3 , wherein the processor outputs a warning when the writing amount is greater than the estimated writing amount. 6 . The information processing system according to claim 3 , wherein the processor notifies the application that the writing is being suppressed while the writing is being suppressed. 7 . The information processing system according to claim 1 , wherein the processor calculates an estimated lifespan of the non-volatile memory from the estimated writing amount, and when the estimated lifespan is shorter than a target lifespan of the non-volatile memory, the processor suppresses the writing by prohibiting the application from being installed in the information processing system. 8 . The information processing system according to claim 7 , wherein the processor outputs a list of one or more applications that are not prohibited from being installed among a plurality of applications including the application. 9 . The information processing system according to claim 7 , wherein when a writing amount that is an amount of data written to the non-volatile memory per unit time by the application installed is greater than the estimated writing amount, the processor issues, to the application installed, a request for a reduction in the writing amount to the non-volatile memory. 10 . The information processing system according to claim 9 , wherein the processor suppresses the writing when the writing amount is greater than the estimated writing amount and the request for the reduction has been issued. 11 . The information processing system according to claim 9 , wherein the processor uninstalls the application from the information processing system when the writing amount is greater than the estimated writing amount and the request for the reduction has been issued. 12 . An information processing method performed by a computer, the information processing method comprising: obtaining an estimated writing amount that is an estimated amount of data to be written to a non-volatile memory by an application per unit time; and suppressing writing to the non-volatile memory by the application based on the estimated writing amount.
Assignees
Inventors
Classifications
Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title
Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title
- G06F3/0616Primary
in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title
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Frequently asked questions
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- What does patent US12596483B2 cover?
- An information processing system includes: an application adder that obtain an estimated writing amount that is estimated to be written to a non-volatile memory by an application per unit time; and the application adder, a monitor, and a controller that suppress writing to the non-volatile memory by the application based on the estimated writing amount.
- Who is the assignee on this patent?
- Panasonic Automotive Systems Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F3/0616. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Apr 07 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).