Electronic package and method for making the same

Patent metadata

Field	Value
Publication number	US-12593397-B2
Application number	US-202318446487-A
Country	US
Kind code	B2
Filing date	Aug 9, 2023
Priority date	Aug 10, 2022
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

An electronic package comprises: a substrate comprising a first region and a second region adjacent to the first region in a lengthwise direction of the substrate; a first electronic component mounted on the substrate in the first region; a second electronic component mounted on the substrate in the second region, wherein the second electronic component does not occupy an entirety of the substrate in a widthwise direction of the substrate; and an encapsulant layer formed on the substrate, wherein at least the second electronic component is exposed from the encapsulant layer, and wherein the encapsulant layer extends from the first region to the second region to reinforce the substrate in both the first region and the second region.

First claim

The invention claimed is:

1 . An electronic package, comprising:
a substrate comprising a first region and a second region adjacent to the first region in a lengthwise direction of the substrate; a first electronic component mounted on the substrate in the first region; a second electronic component mounted on the substrate in the second region, wherein the second electronic component does not occupy an entirety of the substrate in a widthwise direction of the substrate; and an encapsulant layer formed on the substrate, wherein at least the second electronic component is exposed from the encapsulant layer, and wherein the encapsulant layer extends from the first region to the second region to reinforce the substrate in both the first region and the second region; wherein the encapsulant layer comprises: a main body in the first region and at least surrounding the first electronic component, and two reinforcement walls in the second region, wherein the two reinforcement walls are integrally formed with the main body, wherein the two reinforcement walls extend over an entire length of the second region.

2 . The electronic package of claim 1 , wherein the two reinforcement walls have a thickness equal to that of the main body.

3 . The electronic package of claim 1 , wherein the two reinforcement walls are disposed at two lateral sides of the second electronic component, respectively.

4 . The electronic package of claim 1 , wherein the encapsulant layer further comprises:
one or more connection walls formed in the second region, wherein the one or more connection walls traverse across the second electronic component and connect the two reinforcement walls.

5 . The electronic package of claim 1 , wherein the first electronic component is covered by the encapsulant layer.

6 . The electronic package of claim 1 , wherein the first electronic component is exposed from the encapsulant layer.

7 . The electronic package of claim 6 , further comprising:
a lid disposed over the first electronic component for heat dissipation.

8 . The electronic package of claim 7 , further comprising:
a shielding layer disposed between the first electronic component and the lid.

9 . The electronic package of claim 1 , wherein the second electronic component comprises a connector assembly.

10 . A method for making an electronic package, comprising:
providing a substrate comprising a first region and a second region adjacent to the first region in a lengthwise direction of the substrate; mounting a first electronic component on the substrate in the first region; mounting a second electronic component on the substrate in the second region, wherein the second electronic component does not occupy an entirety of the substrate in a widthwise direction of the substrate; and forming an encapsulant layer on the substrate that extends from the first region to the second region to reinforce the substrate in both the first region and the second region, wherein at least the second electronic component is exposed from the encapsulant layer; wherein the encapsulant layer comprises: a main body in the first region and at least surrounding the first electronic component, and two reinforcement walls in the second region, wherein the two reinforcement walls are integrally formed with the main body, wherein the two reinforcement walls extend over an entire length of the second region.

11 . The method of claim 10 , wherein forming an encapsulant layer on the substrate comprises:
attaching a tape on a top surface of the second electronic component; attaching a mold chase above the substrate; injecting an encapsulant material into the mold chase; and detaching the tape from the top surface of the second electronic component.

12 . The method of claim 11 , wherein attaching a tape on a top surface of the second electronic component further comprises:
attaching a first tape on a top surface of the first electronic component; attaching a second tape on a top surface of the second electronic component.

13 . The method of claim 11 , wherein attaching a tape on a top surface of the second electronic component further comprises:
attaching a tape from a top surface of the first electronic component to a top surface of the second electronic component.

14 . The method of claim 11 , wherein the first electronic component is exposed from the encapsulant layer.

15 . The method of claim 14 , further comprising mounting a lid over the first electronic component for heat dissipation.

16 . The method of claim 14 , wherein before mounting a lid over the first electronic component, forming a shielding layer over the first electronic component for shielding interference.

17 . The method of claim 12 , wherein the first electronic component is exposed from the encapsulant layer.

Assignees

• Jcet Stats Chippac Korea Ltd

Inventors

• Lee Seunghyun
• Lee Heesoo
• Park Yejin

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W42/20 Primary

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

• H05K9/0022

  of components mounted on printed circuit boards [PCB] (shields integrated within PCB H05K1/0218; shields integrated within component packages H10W42/20) · CPC title