Display device

Patent metadata

Field	Value
Publication number	US-12592194-B2
Application number	US-202218865763-A
Country	US
Kind code	B2
Filing date	Jul 11, 2022
Priority date	Jul 11, 2022
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

In a CMOS circuit provided as part of a drive circuit in a frame region, a second TFT including a second semiconductor layer formed of an oxide semiconductor includes a first gate electrode provided on one surface side of the second semiconductor layer with a first inorganic insulating film interposed therebetween, and a second gate electrode provided on the other surface side of the second semiconductor layer with a second inorganic insulating film interposed therebetween. The second TFT is configured to apply a negative voltage to the second gate electrode during an off period in which no voltage is applied to the first gate electrode.

First claim

The invention claimed is:

1 . A display device comprising:
a base substrate; and a thin film transistor layer provided on the base substrate, the thin film transistor layer comprising:
a first thin film transistor formed of polysilicon and including a first semiconductor layer, and
a second thin film transistor formed of an oxide semiconductor and including a second semiconductor layer,
wherein a display region, in which an image is displayed, and a frame region surrounding the display region are provided, a complementary metal oxide film semiconductor circuit, obtained by combining the first thin film transistor and the second thin film transistor, is provided in the frame region as a part of a drive circuit, the second thin film transistor in the complementary metal oxide film semiconductor circuit includes:
a first gate electrode provided on one surface side of the second semiconductor layer with a first inorganic insulating film interposed between the first gate electrode and the second semiconductor layer, and
a second gate electrode provided on another surface side of the second semiconductor layer with a second inorganic insulating film interposed between the second gate electrode and the second semiconductor layer,
during an OFF period of the second thin film transistor, a first voltage is applied to the first gate electrode and a second voltage is applied to the second gate electrode, the second voltage being lower than the first voltage, and during an ON period of the second thin film transistor, a third voltage is applied to the second gate electrode, the third voltage being higher than the second voltage.

2 . The display device according to claim 1 ,
wherein during the ON period of the second thin film transistor, the third voltage is higher than the first voltage.

3 . The display device according to claim 2 ,
wherein during the ON period of the second thin film transistor, a fourth voltage is applied to the first gate electrode, the fourth voltage being the same as the third voltage.

4 . The display device according to claim 1 ,
wherein the one surface side of the second semiconductor layer is opposite the base substrate, and the other surface side of the second semiconductor layer is facing the base substrate.

5 . The display device according to claim 4 ,
wherein the first thin film transistor further includes a third gate electrode provided on a side of the first semiconductor layer, opposite the base substrate, with a third inorganic insulating film interposed between the third gate electrode and the first semiconductor layer, and the third gate electrode is formed of the same material as a material of the second gate electrode and in the same layer as a layer of the second gate electrode.

6 . The display device according to claim 5 ,
wherein, in the thin film transistor layer, a first semiconductor film made of polysilicon, the third inorganic insulating film, a first metal film, the second inorganic insulating film, a second semiconductor film made of an oxide semiconductor, the first inorganic insulating film, a second metal film, a fourth inorganic insulating film, and a third metal film are sequentially layered in this stated order, the first semiconductor layer is formed of the first semiconductor film, the second semiconductor layer is formed of the second semiconductor film, the first gate electrode is formed of the second metal film, and the second gate electrode and the third gate electrode are formed of the first metal film.

7 . The display device according to claim 6 ,
wherein the first thin film transistor further includes a first source electrode and a first drain electrode that are formed of the third metal film, and the second thin film transistor further includes a second source electrode and a second drain electrode that are formed of the third metal film.

8 . The display device according to claim 1 ,
wherein each of a plurality of subpixels, included in the display region, includes a plurality of pixel thin film transistors as the second thin film transistor.

9 . The display device according to claim 1 , further comprising:
a light-emitting element layer provided on the thin film transistor layer and including a plurality of light-emitting elements arrayed in correspondence with a plurality of subpixels included in the display region; and a sealing film provided on the light-emitting element layer.

10 . The display device according to claim 9 ,
wherein each of the plurality of light-emitting elements is an organic electroluminescence element.

11 . The display device according to claim 1 ,
wherein the third voltage is the same as the first voltage.

Assignees

• Sharp Display Technology Corp

Inventors

• Miyamoto Tadayoshi

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K50/00

  Organic light-emitting devices (integrated devices or assemblies of multiple devices H10K59/00, H10K65/00; organic semiconductor lasers H01S5/36) · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title