Display panel and display device

Patent metadata

Field	Value
Publication number	US-12592192-B2
Application number	US-202318692793-A
Country	US
Kind code	B2
Filing date	Jul 28, 2023
Priority date	Aug 24, 2022
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

Provided is a display panel. The display panel includes a base substrate, a plurality of first pixels, and a plurality of second pixels. The base substrate is provided with a special-shaped display region, and the special-shaped display region includes a special-shaped edge region and a main display region which are sequentially arranged along the direction distal from the special-shaped edge. The first pixels are disposed in the main display region. The second pixels are disposed in the special-shaped edge region. In the case that the display panel displays a picture of a target gray level, the potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels with different distances from the special-shaped edge are different and are smaller than the potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the first pixels.

First claim

The invention claimed is:

1 . A display panel, comprising: a base substrate, provided with a special-shaped display region, wherein the special-shaped display region comprises a special-shaped edge region and a main display region, the special-shaped edge region being proximal to a special-shaped edge of the special-shaped display region relative to the main display region; a plurality of first pixels, disposed on one side of the base substrate and disposed in the main display region; and a plurality of second pixels, disposed on one side of the base substrate and disposed in the special-shaped edge region; wherein a number of the plurality of second pixels is smaller than a number of the plurality of first pixels, and each of the plurality of first pixels and the plurality of second pixels comprises: a pixel circuit and a light-emitting element, the pixel circuit being coupled to the light-emitting element and being configured to transmit a drive signal to the light-emitting element to drive the light-emitting element to emit light; and in a case that the display panel displays a picture of a target gray level, potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels with different distances from the special-shaped edge among the plurality of second pixels are different, and the potential of the drive signal transmitted to the light-emitting element by the pixel circuit in each of the second pixels is smaller than a potential of the drive signal transmitted to the light-emitting element by the pixel circuit in any of the first pixels; wherein the plurality of second pixels comprise: a plurality of pixel groups, wherein the plurality of pixel groups are sequentially arranged along a direction from the main display region to the special-shaped edge, and distances from the pixel groups to the special-shaped edge are different; the second pixels in each of the pixel groups are arranged in a step shape along an extending direction parallel to the special-shaped edge, and distances from the second pixels in each of the pixel groups to the special-shaped edge are equal; and in the case that the display panel displays the picture of the target gray level, potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels in each of pixel groups are equal, and the potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels in each of the pixel groups gradually decrease along the direction from the main display region to the special-shaped edge, such that display gray levels of the second pixels gradually decrease; and wherein in any two adjacent pixel groups, the potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels gradually decrease according to a target decreasing value, such that along the direction from the main display region to the special-shaped edge, in each two adjacent pixel groups, a ratio of display gray levels of the second pixels in one pixel group to display gray levels of the second pixels in the other pixel group is a target ratio.

2 . The display panel according to claim 1 , wherein the target ratio is 1/2.

3 . The display panel according to claim 1 , wherein the pixel circuit comprises: a data writing circuit, a light-emitting control circuit, a potential adjustment circuit, and a drive circuit;
wherein the data writing circuit is coupled to a data signal terminal, a first scanning terminal, and a first node, respectively and is configured to control, in response to a first scanning signal provided by the first scanning terminal, on-off of the data signal terminal with the first node; the light-emitting control circuit is coupled to a second scanning terminal, a light-emitting control terminal, a first power terminal, a second power terminal, the first node, a second node, and a third node, respectively and is configured to control, in response to a second scanning signal provided by the second scanning terminal, on-off of the second power terminal with the first node and on-off of the second node with the third node, and control, in response to a light-emitting control signal provided by the light-emitting control terminal, on-off of the first power terminal with the third node; the potential adjustment circuit is coupled to the first node, the second node, and a fourth node, respectively and is configured to adjust potentials of the first node, the second node, and the fourth node; the drive circuit is coupled to the second node, the third node, and the fourth node, respectively and is configured to transmit, based on the potentials of the second node and the third node, a drive signal to the fourth node; and the light-emitting element is coupled to the fourth node and the second power terminal respectively and is configured to emit light based on the potential of the fourth node and a second power signal provided by the second power terminal.

4 . The display panel according to claim 3 , wherein the potential adjustment circuit comprises: a first capacitor and a second capacitor;
wherein one end of the first capacitor is coupled to the first node, and the other end of the first capacitor is coupled to the second node; and one end of the second capacitor is coupled to the second node, and the other end of the second capacitor is coupled to the fourth node.

5 . The display panel according to claim 4 , wherein in the second pixels, capacitances of second capacitors are equal, a capacitance of the first capacitor is a target multiple of the capacitance of the second capacitor, the target multiple being less than or equal to 1; and
for each of the second pixels, the target multiple is associated with the distance from the second pixel to the special-shaped edge, such that the potentials of the drive signals transmitted to the light-emitting elements by the pixel circuits in the second pixels with different distances from the special-shaped edge among the plurality of second pixels are different.

6 . The display panel according to claim 5 , wherein each of the first capacitor and the second capacitor comprises: a first electrode plate, an insulating layer, and a second electrode plate sequentially stacked along a direction distal from the base substrate, and an orthographic projection of the first electrode plate on the base substrate is overlapped with an orthographic projection of the second electrode plate on the base substrate; and
in each of the second pixels, dielectric constants of the insulating layers in the first capacitor and the second capacitor are a same, distances between the first electrode plates and the second electrode plates in the first capacitor and the second capacitor are equal, and an overlapping area between the first electrode plate and the second electrode plate in the first capacitor is the target multiple of an overlapping area between the first electrode plate and the second electrode plate in the second capacitor.

7 . The display panel according to claim 6 , wherein an area of the first electrode plate in the first capacitor is the target multiple of an area of the first electrode plate in the second capacitor, and an area of the second electrode plate in the first capacitor is the target multiple of an area of the second electrode plate in the second capacitor.

8 . The display panel according to claim 6 , wherein for the first electrode plate and the second electrode plate in the first capacitor, an area of one electrode plate is a same as an area of one electrode plate of the first electrode plate and the second electrode plate in the second capacitor, and an area of the other elect

Assignees

• Fuzhou Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Li Zongxiang
• Liu Yao
• Yao Liqing
• Lv Yaochao
• Chen Xi
• Zhang Qian
• Zhu Jingguang

Classifications

• G09G2330/02

  Details of power systems and of start or stop of display operation · CPC title

• G09G2320/0242

  Compensation of deficiencies in the appearance of colours · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title