Polishing pads and systems and methods of making and using the same
US-2018281148-A1 · Oct 4, 2018 · US
US12589463B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12589463-B2 |
| Application number | US-202118000887-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 24, 2021 |
| Priority date | Jun 25, 2020 |
| Publication date | Mar 31, 2026 |
| Grant date | Mar 31, 2026 |
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A polishing pad includes a textured polishing layer comprising a working surface and a second surface opposite the working surface. The textured polishing layer comprises a polymeric blend comprising thermoplastic urethane in an amount of between 40 and 95 wt. %, and styrenic copolymer in an amount of between 5 and 60 wt. %, based on the total weight of the textured polishing layer.
Opening claim text (preview).
What is claimed is: 1 . A polishing pad comprising: a textured polishing layer comprising a working surface and a second surface opposite the working surface; wherein the textured polishing layer comprises a polymeric blend comprising thermoplastic urethane in an amount of between 40 and 95 wt. %, and styrenic copolymer in an amount of between 5 and 60 wt. %, based on the total weight of the textured polishing layer; wherein the styrenic polymers exist in separate domains from the thermoplastic urethanes, such that the glass transition temperature of the thermoplastic urethanes and the glass transition of the styrenic polymer are both present in the polymeric blend, wherein the glass transition temperature of the thermoplastic urethanes is below 25 degrees C. and the glass transition temperature of the styrenic polymers is above 60 degrees C. 2 . The polishing pad of claim 1 , wherein the styrenic copolymer comprises styrene acrylonitrile polymers or acrylonitrile butadiene styrene copolymers. 3 . The polishing pad of claim 1 , wherein the polymeric blend has an E′25/E′60 of less than 3.0 and a tensile moduli between 30 MPa and 1000 MPa in the temperature range of 25° C. to 60° C. as measured by DMTA at 1 hertz. 4 . The polishing pad of claim 1 , wherein the working surface includes a plurality of precisely shaped pores, a plurality of precisely shaped asperities, or a plurality of precisely shaped asperities and a plurality of precisely shaped pores. 5 . The polishing pad of claim 1 , wherein the textured polishing layer is formed as a material having a porosity of between 30% and 70%. 6 . The polishing pad of claim 1 , further comprising a subpad, wherein the second surface of the textured polishing layer is adjacent to the subpad. 7 . The polishing pad of claim 6 , further comprising a foam layer, wherein the foam layer is interposed between the second surface of the textured polishing layer and the subpad. 8 . A polishing system comprising the polishing pad of claim 1 and a polishing solution. 9 . The polishing system of claim 8 , wherein the polishing solution is a slurry. 10 . A method of polishing a substrate, the method comprising: providing a polishing pad according to claim 1 ; providing a substrate; contacting the working surface of the polishing pad with the substrate surface; moving the polishing pad and the substrate relative to one another while maintaining contact between the working surface of the polishing pad and the substrate surface, wherein polishing is conducted in the presence of a polishing solution. 11 . The method of polishing a substrate of claim 10 , wherein the polishing solution is a slurry. 12 . The method of polishing a substrate of claim 10 , wherein the substrate is a semiconductor wafer. 13 . The method of polishing a substrate of claim 12 , wherein the semiconductor wafer surface being polished includes at least one of a dielectric material and an electrically conductive material.
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