Display panel and display device

Patent metadata

Field	Value
Publication number	US-12588374-B2
Application number	US-202217779813-A
Country	US
Kind code	B2
Filing date	Apr 25, 2022
Priority date	Apr 12, 2022
Publication date	Mar 24, 2026
Grant date	Mar 24, 2026

Abstract

A display panel and a display device are disclosed. The display panel includes a normal display area and a fan-out display area, and the fan-out display area includes a first area and a second area. Pixel driving circuit units of the display panel are located in the normal display area and the first area, and fan-out wirings are located in the second area. A shielding layer is disposed on one side of a pixel definition layer away from a substrate, and second openings of the shielding layer are defined corresponding to first openings of the pixel definition layer, thereby being beneficial to improve visible mura.

First claim

What is claimed is:

1 . A display panel, comprising a normal display area and a fan-out display area disposed on one side of the normal display area, wherein the fan-out display area comprises a first area and a second area arranged in sequence in a direction from the normal display area toward the fan-out display area, and the display panel comprises:
a substrate;
a driving circuit layer disposed on one side of the substrate and comprising a plurality of pixel driving circuit units and a plurality of fan-out wirings, wherein the pixel driving circuit units are disposed in the normal display area and the first area, the fan-out wirings are disposed in the second area, and a density of the pixel driving circuit units disposed in the first area is greater than a density of the pixel driving circuit units disposed in the normal display area;
at least one connecting wiring layer disposed on one side of the driving circuit layer away from the substrate, wherein each connecting wiring layer comprises a plurality of connecting wirings;
a plurality of anodes disposed on one side of the at least one connecting wiring layer away from the substrate, wherein the pixel driving circuit units are electrically connected to corresponding anodes by the connecting wirings;
a pixel definition layer disposed on one side of the at least one connecting wiring layer away from the substrate and comprising a plurality of first openings exposing at least a part of the anodes; and
a light-emitting layer disposed in the first openings;
wherein the display panel further comprises a shielding layer in the fan-out display area, the pixel definition layer and the shielding layer use a same light-shielding material, and the shielding layer is disposed on one side of the pixel definition layer away from the substrate and comprises a plurality of second openings defined corresponding to the first openings;
an orthographic projection area of the second openings on the substrate is same as an orthographic projection area of the first openings on the substrate.

2 . The display panel according to claim 1 , wherein a thickness of the shielding layer in a direction perpendicular to the substrate ranges from 1 μm to 1.5 μm.

3 . The display panel according to claim 1 , wherein a material of the shielding layer comprises a black matrix.

4 . The display panel according to claim 1 , further comprising a cathode, wherein the shielding layer is disposed between the cathode and the pixel definition layer.

5 . A display panel, comprising a normal display area and a fan-out display area disposed on one side of the normal display area, wherein the fan-out display area comprises a first area and a second area arranged in sequence in a direction from the normal display area toward the fan-out display area, and the display panel comprises:
a substrate; a driving circuit layer disposed on one side of the substrate and comprising a plurality of pixel driving circuit units and a plurality of fan-out wirings, wherein the pixel driving circuit units are disposed in the normal display area and the first area, the fan-out wirings are disposed in the second area, and a density of the pixel driving circuit units disposed in the first area is greater than a density of the pixel driving circuit units disposed in the normal display area; at least one connecting wiring layer disposed on one side of the driving circuit layer away from the substrate, wherein each connecting wiring layer comprises a plurality of connecting wirings; a plurality of anodes disposed on one side of the at least one connecting wiring layer away from the substrate, wherein the pixel driving circuit units are electrically connected to corresponding anodes by the connecting wirings; a pixel definition layer disposed on one side of the at least one connecting wiring layer away from the substrate and comprising a plurality of first openings exposing at least a part of the anodes; and a light-emitting layer disposed in the first openings; wherein the display panel further comprises a shielding layer in the fan-out display area and disposed on one side of the pixel definition layer away from the substrate and comprising a plurality of second openings defined corresponding to the first openings; an orthographic projection area of the second openings on the substrate is same as an orthographic projection area of the first openings on the substrate.

6 . The display panel according to claim 5 , wherein a thickness of the shielding layer in a direction perpendicular to the substrate ranges from 1 μm to 1.5 μm.

7 . The display panel according to claim 5 , wherein a material of the shielding layer comprises a black matrix.

8 . The display panel according to claim 5 , further comprising a cathode, wherein the shielding layer is disposed between the cathode and the pixel definition layer.

9 . The display panel according to claim 5 , wherein the at least one connecting wiring layer comprises a first connecting wiring layer and a second connecting wiring layer, and the display panel further comprises a first planarization layer, a second planarization layer, and a third planarization layer stacked in sequence in a direction away from the substrate;
the first planarization layer covers the side of the driving circuit layer away from the substrate, the first connecting wiring layer is disposed between the first planarization layer and the second planarization layer, and the second connecting wiring layer is disposed between the second planarization layer and the third planarization layer; and the driving circuit layer is electrically connected to the connecting wirings in the first connecting wiring layer by through-holes penetrating the first planarization layer, the first connecting wiring layer is electrically connected to the connecting wirings in the second connecting wiring layer by through-holes penetrating the second planarization layer, and the second connecting wiring layer is electrically connected to the anodes by through-holes penetrating the third planarization layer.

10 . A display device, comprising a display panel comprising a normal display area and a fan-out display area disposed on one side of the normal display area, wherein the fan-out display area comprises a first area and a second area arranged in sequence in a direction from the normal display area toward the fan-out display area, and the display panel comprises:
a substrate; a driving circuit layer disposed on one side of the substrate and comprising a plurality of pixel driving circuit units and a plurality of fan-out wirings, wherein the pixel driving circuit units are disposed in the normal display area and the first area, the fan-out wirings are disposed in the second area, and a density of the pixel driving circuit units disposed in the first area is greater than a density of the pixel driving circuit units disposed in the normal display area; at least one connecting wiring layer disposed on one side of the driving circuit layer away from the substrate, wherein each connecting wiring layer comprises a plurality of connecting wirings; a plurality of anodes disposed on one side of the at least one connecting wiring layer away from the substrate, wherein the pixel driving circuit units are electrically connected to corresponding anodes by the connecting wirings; a pixel definition layer disposed on one side of the at least one connecting wiring layer away from the substrate and comprising a plurality of first openings exposing at least a part of the anodes; and a light-emitting layer disposed in the first openings; wherein the display panel further comprises a shielding layer in the fan-out display area and dispose

Assignees

• Wuhan China Star Optoelectronics Semiconductor Display Tech Co Ltd

Inventors

• Zhou Kun
• Zhong Ping
• Wu Shaojing

Classifications

• H10K59/124

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10K59/8792 Primary

  comprising light absorbing layers, e.g. black layers · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/8052

  Cathodes · CPC title

• H10K50/11

  characterised by the electroluminescent [EL] layers · CPC title