Comparison circuit and image sensing device including the same

Patent metadata

Field	Value
Publication number	US-12587763-B2
Application number	US-202318482598-A
Country	US
Kind code	B2
Filing date	Oct 6, 2023
Priority date	Apr 4, 2023
Publication date	Mar 24, 2026
Grant date	Mar 24, 2026

Abstract

A comparison circuit and an image sensing device including the same are disclosed. The comparison circuit includes a comparison block configured to include a comparator that compares signals of input nodes with each other within a first period and outputs a signal corresponding to a result of the comparison to an output node and configured to initialize the comparator by allowing a voltage of the output node to be fed back to an input terminal of the comparator within a second period, and a stabilization circuit configured to supply a first voltage to the output node within the second period. In the second period, the stabilization circuit is connected to the output node to supply the first voltage. In the first period, connection between the stabilization circuit and the output node is cut off.

First claim

What is claimed is:

1 . A comparison circuit comprising:
a comparison block configured to include a comparator that compares signals of input nodes with each other within a comparison operation period and outputs a signal corresponding to a result of the comparison to an output node and configured to initialize the comparator by allowing a voltage of the output node to be fed back to an input terminal of the comparator within auto zero period; and a stabilization circuit configured to supply a first voltage to the output node within the auto zero period, wherein, in the auto zero period, the stabilization circuit is connected to the output node to supply the first voltage; and wherein, in the comparison operation period, connection between the stabilization circuit and the output node is cut off, wherein the stabilization circuit includes:
a first switching element having one terminal connected to the output node;
a resistor connected to another terminal of the first switching element;
a first capacitor connected between the resistor and a ground voltage terminal; and
a second switching element connected between the ground voltage terminal and a connection node disposed between the first switching element and the resistor.

2 . The comparison circuit according to claim 1 ,
wherein, in the auto zero period, a first loop is formed such that, in a state in which connection between the input nodes and the comparator is cut off and the input terminal of the comparator is connected to an output terminal of the comparator, an initialization voltage is supplied to the input terminal of the comparator and the first voltage is supplied to the output node.

3 . The comparison circuit according to claim 1 ,
wherein, in the comparison operation period, a second loop is formed such that, in a state in which the input nodes is connected to the comparator and connection between the input terminal of the comparator and an output terminal of the comparator is cut off, the connection between the stabilization circuit and the output node is cut off.

4 . The comparison circuit according to claim 1 , wherein the comparison block includes:
a third switching element connected to the input nodes; a second capacitor connected between the third switching element and the comparator; a fourth switching element connected between one terminal of the second capacitor and the ground voltage terminal; and a fifth switching element connected between an input terminal and an output terminal of the comparator.

5 . The comparison circuit according to claim 4 , wherein:
the third switching element is configured to operate inversely with the fourth switching element and the fifth switching element.

6 . The comparison circuit according to claim 4 ,
wherein, in the auto zero period, the third switching element is turned off and the fourth switching element and the fifth switching element are turned on such that the comparator is initialized; wherein, in the comparison operation period, the third switching element is turned on and the fourth switching element and the fifth switching element are turned off such that a comparison operation of the comparator is performed.

7 . The comparison circuit according to claim 1 , wherein:
the first switching element and the second switching element are configured to operate in an inverse manner.

8 . The comparison circuit according to claim 1 ,
wherein, in the auto zero period, the first switching element is turned on and the second switching element is turned off such that the first voltage is supplied to the comparator; and wherein, in the comparison operation period, the first switching element is turned off and the second switching element is turned on such that a comparison operation of the comparator is performed.

9 . The comparison circuit according to claim 1 , wherein:
the first voltage is a resistor-capacitor (RC) network voltage that is provided to the output node based on a resistance value of the resistor and a capacitance value of the first capacitor.

10 . A comparison circuit comprising:
a comparator configured to compare signals of input nodes with each other and configured to output a signal corresponding to a result of the comparison to an output node; a first switching element connected to an input node of the input nodes; a first capacitor connected between the first switching element and the comparator; a second switching element connected between one terminal of the first capacitor and a ground voltage terminal; a third switching element connected between an input terminal and an output terminal of the comparator; a fourth switching element having one terminal connected to the output node; a resistor connected to another terminal of the fourth switching element; a second capacitor connected between the resistor and the ground voltage terminal; and a fifth switching element connected between the ground voltage terminal and a connection node disposed between the fourth switching element and the resistor.

11 . The comparison circuit according to claim 10 , wherein:
in a first period, the first switching element and the fifth switching element are turned off, and the second switching element, the third switching element, and the fourth switching element are turned on such that an offset cancellation operation of the comparator is performed.

12 . The comparison circuit according to claim 10 , wherein:
in a second period, the first switching element and the fifth switching element are turned on, and the second switching element, the third switching element, and the fourth switching element are turned off such that a comparison operation of the comparator is performed.

13 . The comparison circuit according to claim 10 , wherein:
the first switching element and the fifth switching element are configured to operate inversely with the second switching element, the third switching element, and the fourth switching element.

14 . An image sensing device comprising:
a voltage generator configured to generate an operation voltage by pumping an input voltage; a row driver configured to generate a drive voltage based on the operation voltage; and a pixel array configured to generate a pixel signal by controlling a pixel circuit in response to the drive voltage, wherein the voltage generator includes a comparison circuit that compares signals of input nodes with each other and outputs a signal corresponding to a result of the comparison to an output node, wherein the comparison circuit includes a stabilization circuit configured to supply a first voltage to the output node by connecting to the output node within an auto zero period and configured to block a connection to the output node within a comparison operation period, wherein the stabilization circuit includes:
a first switching element having one terminal connected to the output node;
a resistor connected to another terminal of the first switching element;
a capacitor connected between the resistor and a ground voltage terminal; and
a second switching element connected between the ground voltage terminal and a connection node disposed between the first switching element and the resistor.

15 . The image sensing device according to claim 14 , wherein the voltage generator includes:
a clock generator configured to generate a clock signal in response to an output signal of the comparison circuit; and a charge pump configured to generate the operation voltage by pumping the input voltage based on the clock signal.

16 . The image sensing dev

Assignees

• Sk Hynix Inc

Inventors

• Lee Junghan

Classifications

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H03K5/24 Primary

  the characteristic being amplitude · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H04N25/745

  Circuitry for generating timing or clock signals · CPC title

• H04N25/75

  Circuitry for providing, modifying or processing image signals from the pixel array · CPC title