Wireless receiver circuitry with local feedback protection

Patent metadata

Field	Value
Publication number	US-12587218-B2
Application number	US-202318158364-A
Country	US
Kind code	B2
Filing date	Jan 23, 2023
Priority date	Jan 23, 2023
Publication date	Mar 24, 2026
Grant date	Mar 24, 2026

Abstract

Wireless circuitry can have an antenna coupled to a receiving amplifier. The receiving amplifier may be coupled to a local feedback loop configured to reduce the gain of the receiving amplifier for suppressing the signal power when receiving a large input signal. The local feedback loop can include a detector and a feedback controller. The detector may have an input coupled to the receiving amplifier and can output a detected signal. The feedback controller may receive the detected signal and output a corresponding control signal. The control signal can be used to reduce the gain of the receiving amplifier by adjusting one or more components within or coupled to the receiving amplifier. Suppressing large input signals in this way presents no additional parasitic loading to the downlink path and can thus provide overvoltage protection without degrading receiver performance.

First claim

What is claimed is:

1 . Wireless circuitry comprising:
an amplifier configured to receive a radio-frequency signal from one or more antennas; a detection circuit configured to receive signals from the amplifier and configured to output a corresponding detected signal; and a feedback control circuit configured to receive the detected signal from the detection circuit and configured to output a corresponding control signal for adjusting one or more components in the wireless circuitry.

2 . The wireless circuitry of claim 1 , wherein the detection circuit comprises an envelope detector, a radio-frequency power detector, or an amplitude detector.

3 . The wireless circuitry of claim 1 , further comprising:
a variable gain amplifier coupled to an output of the amplifier; a mixer coupled to an output of the variable gain amplifier; and an analog-to-digital converter coupled to an output of the mixer.

4 . The wireless circuitry of claim 1 , wherein the feedback control circuit comprises a differential-to-single-ended amplifier.

5 . The wireless circuitry of claim 1 , wherein the feedback control circuit comprises a differential-to-single-ended amplifier having an adjustable offset.

6 . The wireless circuitry of claim 1 , wherein the feedback control circuit comprises a differential-to-single-ended amplifier exhibiting a transfer function with an adjustable slope.

7 . The wireless circuitry of claim 1 , further comprising a filter circuit coupled to an output of the feedback control circuit.

8 . The wireless circuitry of claim 1 , wherein the control signal adjusts one or more power supply switches in the amplifier.

9 . The wireless circuitry of claim 1 , wherein the control signal adjusts a mode switch coupled to an input of the amplifier, the mode switch being activated when the antenna is transmitting radio-frequency signals and being deactivated when the antenna is receiving radio-frequency signals.

10 . The wireless circuitry of claim 1 , wherein the control signal adjusts one or more bias levels in the amplifier.

11 . The wireless circuitry of claim 10 , wherein:
the amplifier comprises a first amplifier stage and a second amplifier stage; and the control signal adjusts a bias level of a transformer coil disposed between the first and second amplifier stages.

12 . The wireless circuitry of claim 1 , further comprising one or more pull-down circuits coupled between the feedback control circuit and the amplifier.

13 . The wireless circuitry of claim 1 , further comprising one or more multiplexers coupled between the feedback control circuit and the amplifier.

14 . A method of operating wireless circuitry, the method comprising:
with an amplifier, receiving a radio-frequency signal from one or more antennas; generating an envelope signal based on the radio-frequency signal received at the amplifier; and reducing a gain of the amplifier in response to detecting that the envelope signal exceeds a threshold level.

15 . The method of claim 14 , further comprising:
with a feedback controller, receiving the envelope signal and generating a corresponding control signal for reducing the gain of the amplifier.

16 . The method of claim 15 , wherein reducing the gain of the amplifier comprises adjusting one or more power supply switches of the amplifier in accordance with an amplifier transfer function with an adjustable slope or offset.

17 . The method of claim 15 , wherein reducing the gain of the amplifier comprises adjusting a transmit-receive mode switch in accordance with an amplifier transfer function with an adjustable slope or offset, the method further comprising:
during a transmit mode, activating the transmit-receive mode switch; and during a receive mode, deactivating the transmit-receive mode switch.

18 . The method of claim 15 , wherein reducing the gain of the amplifier comprises adjusting one or more bias levels of the amplifier in accordance with an amplifier transfer function with an adjustable slope or offset.

19 . The method of claim 18 , wherein adjusting one or more bias levels of the amplifier comprises pulling down the one or more bias levels of the amplifier.

20 . Wireless circuitry comprising:
an amplifier having at least a first amplifier stage and a second amplifier stage, an input coupled to one or more antennas, and an output coupled to one or more processors; a transmit-receive mode switch coupled to the input of the amplifier; a detector having an input coupled to the second amplifier stage and configured to generate a detected signal; and a feedback controller configured to receive the detected signal and to generate a corresponding control signal for adjusting at least one of
a first power supply switch in the first amplifier stage,
a second power supply switch in the second amplifier stage,
a bias level of an input transistor in the first amplifier stage,
a bias level of a cascode transistor coupled in series with the input transistor in the first amplifier stage, and
a bias level of a coil coupled between the first and second amplifier stages.

Assignees

• Apple Inc

Inventors

• Shin Woorim
• Nick Morteza
• Signoff David M

Classifications

• H04B1/16 Primary

  Circuits · CPC title

• H04B2001/0408

  with power amplifiers · CPC title

• H04B1/525

  with means for reducing leakage of transmitter signal into the receiver · CPC title

• H04B1/123

  using adaptive balancing or compensation means (adaptive filter circuits and algorithms H03H) · CPC title

• H04B1/0458 Primary

  Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H) · CPC title