Methods, systems, and apparatuses for reducing DC bias

US12587210B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12587210-B2
Application numberUS-202318521725-A
CountryUS
Kind codeB2
Filing dateNov 28, 2023
Priority dateDec 9, 2022
Publication dateMar 24, 2026
Grant dateMar 24, 2026

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Abstract

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Various examples in accordance with the present disclosure provide example methods, systems, and apparatuses that may reduce direct current (DC) bias in biased signal inputs. For example, an example system includes a signal operator and an adaptive filter. The signal operator receives a biased signal input. The adaptive filter provides an estimated bias parameter to the signal operator. The signal operator generates an unbiased signal output based at least in part on the biased signal input and the estimated bias parameter.

First claim

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The invention claimed is: 1 . A system comprising: a signal operator receiving a biased signal input; and an adaptive filter providing an estimated bias parameter to the signal operator, the estimated bias parameter indicating an estimated bias component associated with the biased signal input, wherein the signal operator generates an unbiased signal output based at least in part on the biased signal input and the estimated bias parameter. 2 . The system of claim 1 , wherein the signal operator comprises an adder. 3 . The system of claim 1 , wherein, when generating the unbiased signal output, the signal operator removes the estimated bias component from the biased signal input. 4 . The system of claim 3 , wherein the signal operator receives the biased signal input via a signal input data path and provides the unbiased signal output via a signal output data path, wherein the adaptive filter is not on the signal input data path and is not on the signal output data path. 5 . The system of claim 1 , wherein the adaptive filter implements a Least Mean Square (LMS) algorithm. 6 . The system of claim 5 , wherein the adaptive filter comprises an adder and a delayer. 7 . The system of claim 5 , wherein the adaptive filter receives an initial amplitude input. 8 . The system of claim 7 , wherein the initial amplitude input is correlated to the biased signal input. 9 . A method comprising: receiving a biased signal input; generating an estimated bias parameter indicating an estimated DC bias associated with the biased signal input; and generating an unbiased signal output based at least in part on the biased signal input and the estimated bias parameter. 10 . The method of claim 9 , further comprising: receiving an initial amplitude input. 11 . The method of claim 10 , wherein the initial amplitude input is correlated to the biased signal input. 12 . The method of claim 10 , further comprising: generating a first estimated bias parameter associated with the biased signal input based at least in part on the initial amplitude input; and generating a first error signal output based at least in part on the first estimated bias parameter and the biased signal input. 13 . The method of claim 12 , further comprising: generating a second estimated bias parameter based at least in part on adding the first estimated bias parameter to a first multiplication of the first error signal output and an adaptive adjustment parameter; and generating a second error signal output based at least in part on the second estimated bias parameter and the biased signal input. 14 . An analog-to-digital converter (ADC) comprising: a sigma-delta modulation system generating a biased signal; and a DC bias reduction system comprising a signal operator and an adaptive filter, wherein the signal operator receives the biased signal, wherein the adaptive filter provides an estimated bias parameter to the signal operator, wherein the signal operator generates an unbiased signal based at least in part on the biased signal and the estimated bias parameter. 15 . The ADC of claim 14 , wherein the signal operator comprises an adder. 16 . The ADC of claim 14 , wherein, when generating the unbiased signal, the signal operator removes an estimated bias component from the biased signal based on the estimated bias parameter. 17 . The ADC of claim 16 , wherein the signal operator receives the biased signal via a signal input data path and provides the unbiased signal via a signal output data path, wherein the adaptive filter is not on the signal input data path and is not on the signal output data path. 18 . The ADC of claim 17 , wherein the adaptive filter implements a Least Mean Square (LMS) algorithm.

Assignees

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Classifications

  • Digital adaptive filters · CPC title

  • H03M3/458Primary

    Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

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What does patent US12587210B2 cover?
Various examples in accordance with the present disclosure provide example methods, systems, and apparatuses that may reduce direct current (DC) bias in biased signal inputs. For example, an example system includes a signal operator and an adaptive filter. The signal operator receives a biased signal input. The adaptive filter provides an estimated bias parameter to the signal operator. The sig…
Who is the assignee on this patent?
St Microelectronics Int Nv
What technology area does this patent fall under?
Primary CPC classification H03M3/458. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).