Method and apparatus for controlling a computing process

Patent metadata

Field	Value
Publication number	US-12585196-B2
Application number	US-202217751110-A
Country	US
Kind code	B2
Filing date	May 23, 2022
Priority date	Dec 9, 2016
Publication date	Mar 24, 2026
Grant date	Mar 24, 2026

Abstract

A method of controlling a computer process for designing or verifying a photolithographic component, the method including building a source tree including nodes of the process, including dependency relationships among the nodes, defining, for some nodes, at least two different process conditions, expanding the source tree to form an expanded tree, including generating a separate node for each different defined process condition, and duplicating dependent nodes having an input relationship to each generated separate node, determining respective computing hardware requirements for processing the node, selecting computer hardware constraints based on capabilities of the host computing system, determining, based on the requirements and constraints and on dependency relations in the expanded tree, an execution sequence for the computer process, and performing the computer process on the computing system.

First claim

The invention claimed is:

1 . A method comprising:
expanding a source tree to form an expanded tree, wherein the source tree comprises a plurality of nodes of a computer process, including dependency relationships among at least some of the plurality of nodes, wherein at least one of the nodes represents a model or simulation for a processing step of a device manufacturing method and wherein process conditions of the device manufacturing method are defined for at least one of the nodes, wherein the expanding comprises:
generating, for each different process condition, a separate node for each different process condition,
duplicating, for each generated separate node, one or more dependent nodes having an input relationship to each generated separate node;
determining, for each node in the source tree or in the expanded tree, respective computing hardware requirements for processing the node; and determining, by a hardware computer system based on the determined computing hardware requirements, on one or more computer hardware constraints based on capabilities of a computing system on which the computer process is to be performed, and on dependency relationships in the source or expanded tree, an execution sequence for the computer process.

2 . The method of claim 1 , wherein the determining an execution sequence further comprises:
defining a plurality of time steps for performing the computer process; assigning each node to a time step; and assigning each node a life span in time steps.

3 . The method of claim 2 , wherein the life span of each node comprises a number of time steps in which there exists at least one node that has a dependency on that node.

4 . The method of claim 1 , further comprising performing the computer process on the computing system based on the determined execution sequence.

5 . A computer program product comprising a non-transitory machine-readable medium having instructions therein, the instructions, upon execution by a computer system, configured to cause the computer system to at least:
expand a source tree to form an expanded tree, wherein the source tree comprises a plurality of nodes of a computer process, including dependency relationships among at least some of the plurality of nodes, wherein at least one of the nodes represents a model or simulation for a processing step of a device manufacturing method and wherein process conditions of the device manufacturing method are defined for at least one of the nodes, wherein the expansion comprises:
generation, for each different process condition, of a separate node for each different process condition,
duplication, for each generated separate node, of one or more dependent nodes having an input relationship to each generated separate node;
determine, for each node in the source tree or in the expanded tree, respective computing hardware requirements for processing the node; and determine, based on the determined computing hardware requirements, on one or more computer hardware constraints based on capabilities of a computing system on which the computer process is to be performed, and on dependency relationships in the source or expanded tree, an execution sequence for the computer process.

6 . The product of claim 5 , wherein the one or more computer hardware constraints include processing power and/or memory.

7 . The product of claim 5 , wherein the one or more computer hardware constraints comprises minimization of an amount of memory required to execute the computer process and/or minimization of an amount of processing power required to execute the computer process.

8 . The product of claim 5 , wherein the one or more hardware constraints comprises an intermediate between minimization of an amount of memory required to execute the computer process and minimization of an amount of processing power required to execute the computer process.

9 . The product of claim 5 , wherein at least one of the nodes of the process represents one or more inputs selected from: a process window, a focus condition, a layer design, a detector process, or geometry.

10 . The product of claim 5 , wherein the instructions configured to cause the computer system to determine an execution sequence are further configured to cause the computer system to:
define a plurality of time steps for performing the computer process; assign each node to a time step; and assign each node a life span in time steps.

11 . The product of claim 10 , wherein the life span of each node comprises a number of time steps in which there exists at least one node that has a dependency on that node.

12 . A method comprising:
determining, for each node of a plurality of nodes of a computer process, respective computing hardware requirements for processing the node, wherein at least one process condition of a device manufacturing method is defined for at least one of the nodes; and determining, by a hardware computer system based on the determined computing hardware requirements, on one or more computer hardware constraints based on capabilities of a computing system on which the computer process is to be performed, and on dependency relationships among at least some of the nodes, an execution sequence for the computer process, wherein the determining the execution sequence comprises:
assigning each node to a time step value of a plurality of time step values for performing the computer process, and
assigning each node a life span value in terms of a time step value of the plurality of time steps.

13 . The method of claim 12 , wherein at least one of the nodes represents a model or simulation for a processing step of a device manufacturing method and wherein at least one of the nodes of the process represents one or more inputs selected from: a process window, a focus condition, a layer design, a detector process, or geometry.

14 . A computer program product comprising a non-transitory machine-readable medium having instructions therein, the instructions, upon execution by a computer system, configured to cause the computer system to at least:
determine, for each node of a plurality of nodes of a computer process, respective computing hardware requirements for processing the node, wherein at least one process condition of a device manufacturing method is defined for at least one of the nodes; and determine, based on the determined computing hardware requirements, on one or more computer hardware constraints based on capabilities of a computing system on which the computer process is to be performed, and on dependency relationships among at least some of the nodes, an execution sequence for the computer process, wherein the determination of the execution sequence comprises:
assignation of each node to a time step value of a plurality of time step values for performing the computer process, and
assignation of each node a life span value in terms of a time step value of the plurality of time step values.

15 . The computer product of claim 14 , wherein the life span value of each node comprises a number of one or more time steps in which there exists at least one node that has a dependency on that node.

16 . The computer product of claim 14 , wherein at least one of the nodes represents a model or simulation for a processing step of a device manufacturing method.

17 . The computer product of claim 16 , wherein at least one of the nodes of the process represents one or more inputs selected from: a process window, a focus condition, a layer design, a detector process, or geometry.

Assignees

• Asml Netherlands Bv

Inventors

• Lu Yen-Wen
• Chen Xiaorui
• Lin Yang

Classifications

• G05B2219/45031

  Manufacturing semiconductor wafers · CPC title

• G05B19/41865

  characterised by job scheduling, process planning, material flow · CPC title

• G06F30/20

  Design optimisation, verification or simulation (optimisation, verification or simulation of circuit designs G06F30/30) · CPC title

• G05B2219/37224

  Inspect wafer · CPC title

• G05B19/41875

  characterised by quality surveillance of production · CPC title