Display panel and display apparatus

US12581818B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12581818-B2
Application numberUS-202318214254-A
CountryUS
Kind codeB2
Filing dateJun 26, 2023
Priority dateMar 14, 2023
Publication dateMar 17, 2026
Grant dateMar 17, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel and a display apparatus are provided in the present disclosure. The display panel includes a display region and a non-display region, where the non-display region includes a first region, a bending region and a second region; the second region includes a binding region; the display region includes a first display region; and the binding region is at least partially overlapped with the first display region. The display panel further includes a plurality of sub-pixels, including pixel circuits and light-emitting elements, and first signal lines electrically connected to the pixel circuits. The light-emitting elements include a first-color light-emitting element; and at least in the first display region, an orthographic projection of a first signal line on a plane of the display panel is at a periphery of an orthographic projection of an anode of the first-color light-emitting element on the plane of the display panel.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel, comprising: a display region and a non-display region, wherein: the non-display region includes a first region, a bending region and a second region which are on a same side of the display region; the bending region is between the first region and the second region; the second region includes a binding region; the display region includes a first display region; along a first direction, the binding region is at least partially overlapped with the first display region; and the first direction is a thickness direction of the display panel; a plurality of sub-pixels, including pixel circuits and light-emitting elements which are electrically connected to each other; and first signal lines electrically connected to the pixel circuits, wherein: a light-emitting element includes an anode, a light-emitting layer, and a cathode which are arranged along the first direction; the light-emitting elements include a first-color light-emitting element; and at least in the first display region, an orthographic projection of a first signal line on a plane of the display panel is at a periphery of an orthographic projection of an anode of the first-color light-emitting element on the plane of the display panel; and in the first display region, the first signal line includes a plurality of sub-line segments connected end-to-end; and at least a part of the plurality of sub-line segments is wired along a contour of the anode of the first-color light-emitting element. 2 . The display panel according to claim 1 , further including: a data line and a first power signal line, wherein the first signal lines include at least one of the data line and the first power signal line. 3 . The display panel according to claim 2 , wherein: in the first display region, the data line and the first power signal line are arranged in different layers. 4 . The display panel according to claim 3 , further including: a substrate; and a first metal layer, a capacitor metal layer, a second metal layer, and a third metal layer which are disposed on a side of the substrate, wherein: along the first direction, the capacitor metal layer is on a side of the first metal layer away from the substrate; the second metal layer is on a side of the capacitor metal layer away from the substrate; and the third metal layer is between the second metal layer and the light-emitting element; and the data line is in one layer of the second metal layer, the capacitor metal layer and the third metal layer; and the first power signal line is in another layer of the second metal layer, the capacitor metal layer and the third metal layer. 5 . A display panel, comprising: a display region and a non-display region, wherein: the non-display region includes a first region, a bending region and a second region which are on a same side of the display region; the bending region is between the first region and the second region; the second region includes a binding region; the display region includes a first display region; along a first direction, the binding region is at least partially overlapped with the first display region; and the first direction is a thickness direction of the display panel; a plurality of sub-pixels, including pixel circuits and light-emitting elements which are electrically connected to each other; and first signal lines electrically connected to the pixel circuits, wherein: a light-emitting element includes an anode, a light-emitting layer, and a cathode which are arranged along the first direction; the light-emitting elements include a first-color light-emitting element; and at least in the first display region, an orthographic projection of a first signal line on a plane of the display panel is at a periphery of an orthographic projection of an anode of the first-color light-emitting element on the plane of the display panel; and the display region further includes a second display region, configured at a periphery of the first display region, wherein the first signal lines include a first line segment in the first display region and a second line segment in the second display region; and a linewidth of the first line segment is less than a linewidth of the second line segment. 6 . The display panel according to claim 1 , further including: a substrate; a first metal layer, a capacitor metal layer, a second metal layer, a third metal layer and a fourth metal layer which are disposed on a side of the substrate, wherein along the first direction, the capacitor metal layer is on a side of the first metal layer away from the substrate; the second metal layer is on a side of the capacitor metal layer away from the substrate; the third metal layer is between the second metal layer and the fourth metal layer; and the fourth metal layer is on a side of the light-emitting element facing the substrate; and a plurality of second signal lines in the fourth metal layer, wherein at least a part of the plurality of second signal lines is in the first display region; and in the first display region, an orthographic projection of a second signal line on the plane of the display panel is at the periphery of the orthographic projection of the anode of the first-color light-emitting element on the plane of the display panel. 7 . The display panel according to claim 6 , wherein: the display region includes a first display region and a second display region, wherein the second display region is on at least one side of the first display region along a second direction; both the first display region and the second display region include a plurality of data lines extending along a third direction and arranged along the second direction; and the second direction intersects the third direction; the non-display region includes a plurality of fan-out wirings, wherein the plurality of data lines is electrically connected to the plurality of fan-out wirings; and a data line in the second display region is electrically connected to a fan-out wiring through a connection wiring; and the plurality of second signal lines includes the connection wiring. 8 . The display panel according to claim 1 , wherein: the light-emitting elements further include a second-color light-emitting element and a third-color light-emitting element, wherein a cleaving temperature of a material of a light-emitting layer in the first-color light-emitting element is T1, a cleaving temperature of a material of a light-emitting layer in the second-color light-emitting element is T2, and a cleaving temperature of a material of a light-emitting layer in the third-color light-emitting element is T3, wherein T1<T2, and T1<T3. 9 . The display panel according to claim 8 , wherein: T2<T3; and in the first display region, an orthographic projection of the first signal line on the plane of the display panel is at a periphery of an orthographic projection of an anode of the second-color light-emitting element on the plane of the display panel. 10 . The display panel according to claim 8 , wherein: in the first display region, along the first direction, the first signal line is not overlapped with each of the first-color light-emitting element, the second-color light-emitting element and the third-color light-emitting element. 11 . The display panel according to claim 1 , wherein: the display region further includes a transition region around the first display region; and in the transition region, the orthographic projection of the first signal line on the plane of the display panel is at the periphery of the orthographic projection of the anode of the first-color light-emitting element on the plane of the display panel.

Assignees

Inventors

Classifications

  • Preventing or counteracting the effects of ageing · CPC title

  • Temperature compensation · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • organic, e.g. using organic light-emitting diodes [OLED] · CPC title

  • Arrangements for heating and cooling · CPC title

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What does patent US12581818B2 cover?
A display panel and a display apparatus are provided in the present disclosure. The display panel includes a display region and a non-display region, where the non-display region includes a first region, a bending region and a second region; the second region includes a binding region; the display region includes a first display region; and the binding region is at least partially overlapped wi…
Who is the assignee on this patent?
Wuhan Tianma Micro Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/1216. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 17 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).