Carrier substrate, laminate, and method for manufacturing electronic device

US12581730B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12581730-B2
Application numberUS-202218066497-A
CountryUS
Kind codeB2
Filing dateDec 15, 2022
Priority dateJul 3, 2015
Publication dateMar 17, 2026
Grant dateMar 17, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A carrier substrate to be used, when manufacturing a member for an electronic device on a surface of a substrate, by being bonded to the substrate, includes at least a first glass substrate. The first glass substrate has a compaction described below of 80 ppm or less. Compaction is a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A method for manufacturing an electronic device, the method comprising: forming a member for an electronic device on a surface of a substrate of a laminate comprising a carrier substrate and the substrate formed on the carrier substrate to obtain a member for an electronic device-attached-laminate; and removing the carrier substrate from the member for an electronic device-attached-laminate to obtain an electronic device having the substrate and the member for an electronic device, wherein the carrier substrate comprises at least a first glass substrate, the first glass substrate has a compaction of from 20 to 80 ppm, wherein the compaction is determined as a shrinkage when subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour, the first glass substrate comprises a glass comprising, in terms of mass percentages based on oxides, the following: from 57% to 62.1% of SiO 2 , from 19% to 24% of Al 2 O 3 , from 2.6% to less than 5% of B 2 O 3 , from 2% to 6% of MgO, from 4.1% to 7% of CaO, from 2.3% to 9% of SrO, from 1% to 10% of BaO, and from 14% to 16% of MgO+CaO+SrO+BaO, and the first glass substrate has a strain point of at least 700° C. 2 . The method for manufacturing an electronic device according to claim 1 , wherein the compaction is from 20 to 70 ppm. 3 . The method for manufacturing an electronic device according to claim 1 , wherein the member for an electronic device comprises a low-temperature polysilicon (LTPS). 4 . The method for manufacturing an electronic device according to claim 1 , wherein in the forming of the member for an electronic device a temperature is at least 450° C. 5 . The method for manufacturing an electronic device according to claim 1 , wherein the carrier substrate further comprises an adhesive layer formed on the first glass substrate.

Assignees

Inventors

Classifications

  • poly-Si · CPC title

  • in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

  • Filling or closing of cells · CPC title

  • Methods for their manufacture, e.g. printing, electro-deposition or photolithography · CPC title

  • Glass · CPC title

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What does patent US12581730B2 cover?
A carrier substrate to be used, when manufacturing a member for an electronic device on a surface of a substrate, by being bonded to the substrate, includes at least a first glass substrate. The first glass substrate has a compaction described below of 80 ppm or less. Compaction is a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at …
Who is the assignee on this patent?
Agc Inc
What technology area does this patent fall under?
Primary CPC classification C03C3/091. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Mar 17 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).