Power amplifier and electronic device including the same

Patent metadata

Field	Value
Publication number	US-12580533-B2
Application number	US-202318168223-A
Country	US
Kind code	B2
Filing date	Feb 13, 2023
Priority date	Dec 1, 2021
Publication date	Mar 17, 2026
Grant date	Mar 17, 2026

Abstract

The disclosure relates to a 5th generation (5G) or a pre-5G communication system for supporting a higher data transmission rate after a 4th generation (4G) communication system such as long-term evolution (LTE). A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first power amplifier, a second power amplifier, a first transmission line connected to an output end of the first power amplifier, a second transmission line connected to an input end of the second power amplifier, a first network, and a second network, the first network may interconnect a first node connected with one end of the first transmission line and a second node connected with an output end of the second power amplifier, the one end of the first transmission line may be positioned on an opposite side with respect to the output end of the first power amplifier, and the second network may connect the first node, the second node, and a third node which is an output end of the Doherty power amplifier.

First claim

What is claimed is:

1 . A Doherty power amplifier of a wireless communication system, the Doherty power amplifier comprising:
a power divider dividing an input signal and outputting a first divided signal to a first transmission line, and a second divided signal to a second transmission line; a first power amplifier receiving the first divided signal via the first transmission line, and outputting a first output signal to a first node via a first impedance matching circuit, in both of a high power state and a low power state; a second power amplifier receiving the second divided signal via the second transmission line, and outputting a second output signal to a second node via a second impedance matching circuit, in the low power state; a power combining circuit combing a first power input received from the first node and a second power input received from the second node, and outputting a combined signal; and a common mode circuit configured with reactance component connecting the first node and the second node, wherein the second transmission line includes a phase compensating circuit compensating phase difference between the first power amplifier and the second power amplifier, and wherein, the common mode circuit electrically separates the first node and the second node, in case that the Doherty power amplifier operates in the high power state.

2 . The Doherty power amplifier of claim 1 ,
wherein the first power amplifier is a class-AB power amplifier, and wherein the second power amplifier is a class-C power amplifier.

3 . The Doherty power amplifier of claim 1 , wherein the common mode circuit comprises at least one of a lumped element, a distributed element, or a combination of the lumped element and the distributed element.

4 . The Doherty power amplifier of claim 1 ,
wherein the power combining circuit comprises a third impedance matching circuit and a fourth impedance matching circuit, and wherein the third impedance matching circuit and the fourth impedance matching circuit are connected with an output node of the power combining circuit at an arbitrary point.

5 . The Doherty power amplifier of claim 4 , wherein, in case that the Doherty power amplifier operates in the high power state, a characteristic impedance ratio of the third impedance matching circuit and the fourth impedance matching circuit is determined based on a maximum output power ratio of the first power amplifier and the second power amplifier.

6 . The Doherty power amplifier of claim 4 , wherein, in case that the Doherty power amplifier operates in the low power state, an electrical length of the first impedance matching circuit and a reactance value of the common mode circuit are determined based on a maximum output power ratio of the first power amplifier and the second power amplifier and a modulation rate of load impedance of the first power amplifier.

7 . The Doherty power amplifier of claim 1 , wherein the power combining circuit comprises a first transformer connecting the first node and an output node of the power combining circuit and a second transformer connecting the second node and the third output node.

8 . The Doherty power amplifier of claim 7 , wherein, in case that the Doherty power amplifier operates in the high power state, a first turns ratio of the first transformer and a second turns ratio of the second transformer are determined based on characteristic impedance of the first impedance matching circuit, load impedance of the Doherty power amplifier and a maximum output power ratio of the first power amplifier and the second power amplifier.

9 . The Doherty power amplifier of claim 7 , wherein, in case that the Doherty power amplifier operates in the low power state, an electrical length of the first impedance matching circuit and a reactance value of the common mode circuit first are determined based on a maximum output power ratio of the first power amplifier and the second power amplifier and a modulation rate of load impedance of the first power amplifier.

10 . The Doherty power amplifier of claim 1 , wherein an electrical length of the first impedance matching circuit is equal to an electrical length of the second transmission line.

11 . An electronic device of a wireless communication system, the electronic device comprising:
at least one processor; a plurality of radio frequency (RF) chains connected with the at least one processor; and a plurality of antenna elements connected with the plurality of the RF chains, wherein a first RF chain of the plurality of the RF chains comprises a Doherty power amplifier, wherein the Doherty power amplifier comprises:
a power divider dividing an input signal and outputting a first divided signal to a first transmission line, and a second divided signal to a second transmission line,
a first power amplifier receiving the first divided signal via the first transmission line, and outputting a first output signal to a first node via a first impedance matching circuit, in both of a high power state and a low power state,
a second power amplifier receiving the second divided signal via the second transmission line, and outputting a second output signal to a second node via a second impedance matching circuit, in the low power state,
a power combining circuit combing a first power input received from the first node and a second power input received from the second node, and outputting a combined signal, and
a common mode circuit configured with reactance component connecting the first node and the second node,
wherein the second transmission line includes a phase compensating circuit compensating phase difference between the first power amplifier and the second power amplifier, and wherein, the common mode circuit electrically separates the first node and the second node, in case that the Doherty power amplifier operates in the high power state.

12 . The electronic device of claim 11 ,
wherein the first power amplifier is a class-AB power amplifier, and wherein the second power amplifier is a class-C power amplifier.

13 . The electronic device of claim 11 wherein the common mode circuit comprises at least one of a lumped element, a distributed element, or a combination of the lumped element and the distributed element.

14 . The electronic device of claim 11 ,
wherein the power combining circuit comprises a third impedance matching circuit transmission line and a fourth impedance matching circuit, and wherein the third impedance matching circuit and the fourth impedance matching circuit are connected with an output node of the power combining circuit at an arbitrary point.

15 . The electronic device of claim 14 , wherein, in case that the Doherty power amplifier operates in the high power state, a characteristic impedance ratio of the third impedance matching circuit and the fourth impedance matching circuit is determined based on a maximum output power ratio of the first power amplifier and the second power amplifier.

16 . The electronic device of claim 14 , wherein, in case that the Doherty power amplifier operates in the low power state, an electrical length of the first impedance matching circuit and a reactance value of the common mode circuit are determined based on a maximum output power ratio of the first power amplifier and the second power amplifier and a modulation rate of load impedance of the first power amplifier.

17 . The electronic device of claim 11 , wherein the power combining circuit comprises a first transformer connecting the first node and an output node

Assignees

• Samsung Electronics Co Ltd
• Research & Business Found Sungkyunkwan Univ

Inventors

• Jee Seunghoon
• Yang Youngoo
• Chen Yifei
• Kang Hyunuk
• Kim Kyoungtae
• Kim Changwook
• Woo Youngyoon
• Choi Woojin

Classifications

• H03F1/565

  using inductive elements · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

• H03F1/0288 Primary

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F3/602

  Combinations of several amplifiers · CPC title