Systems and methods for dual standby modes in memory
US-12020769-B2 · Jun 25, 2024 · US
Systems and methods for dual standby modes in memory
US12580010B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12580010-B2 |
| Application number | US-202418668795-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 20, 2024 |
| Priority date | Nov 17, 2021 |
| Publication date | Mar 17, 2026 |
| Grant date | Mar 17, 2026 |
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Abstract
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1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
First claim
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I claim: 1 . A method for configuring memory, the method comprising: configuring a bias system to provide a first bias voltage corresponding to a first standby mode; receiving a standby mode indication selecting a second standby mode; upon receiving the standby mode indication, configuring the bias system to provide a second bias voltage corresponding to the second standby mode, wherein the second bias voltage is different from the first bias voltage, and wherein the first a…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US12580010B2 cover?
- 1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltag…
- Who is the assignee on this patent?
- Everspin Technologies Inc
- What technology area does this patent fall under?
- Primary CPC classification G11C11/1673. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 17 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).