Display Substrate and Preparation Method thereof, and Display Apparatus
US-2024188411-A1 · Jun 6, 2024 · US
US12575284B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12575284-B2 |
| Application number | US-202217759846-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 13, 2022 |
| Priority date | Jun 30, 2022 |
| Publication date | Mar 10, 2026 |
| Grant date | Mar 10, 2026 |
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A display panel and an electronic device are provided. The display panel includes a first stacked layer and a second stacked layer disposed on a base substrate. Openings are defined on the second stacked layer corresponding to transparent areas, and the openings penetrate the second stacked layer, the first stacked layer, and at least part of the base substrate. The first stacked layer in the transparent areas is removed by forming the openings in the transparent areas. Therefore, transmittance in the transparent areas is improved, thereby solving a problem of poor transmittance in current transparent display screens.
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What is claimed is: 1 . A display panel, having pixel areas and transparent areas located between the pixel areas and comprising: a base substrate; a first stacked layer disposed on the base substrate; and a second stacked layer disposed on one side of the first stacked layer away from the base substrate; wherein openings are defined on the second stacked layer corresponding to the transparent areas, each of the openings comprises a first sub-hole, a second sub-hole, and a third sub-hole intercommunicated to each other, the first sub-hole penetrates through the second stacked layer, the second sub-hole penetrates through the first stacked layer, and the third sub-hole penetrates through at least the part of the base substrate; wherein the second stacked layer comprises a planarization layer disposed on the first stacked layer and a pixel definition layer disposed on one side of the planarization layer away from the first stacked layer, and pixel openings are defined on the pixel definition layer corresponding to the pixel areas; wherein the display panel further comprises: a first electrode disposed on the planarization layer in the pixel areas, wherein the pixel openings expose part of the first electrode; an organic auxiliary layer covering the pixel definition layer, walls of the pixel openings and the first electrode; a light-emitting layer disposed in the pixel openings; and a second electrode disposed on a top surface of the light-emitting layer and a top surface of a part of the organic auxiliary layer covering the pixel definition layer; wherein the top surface of the light-emitting layer, the top surface of the part of the organic auxiliary layer covering the pixel definition layer, and a bottom surface of the second electrode layer line along a same plane; wherein the second electrode extends to the transparent areas and is defined with gaps corresponding to the openings; wherein the organic auxiliary layer extends into the openings in the transparent areas and is disconnected between the first stacked layer and the base substrate, and the organic auxiliary layer covers a first sidewall of the first sub-hole, a second sidewall of the second sub-hole, a third sidewall of the third sub-hole, and a bottom of the third sub-hole. 2 . The display panel according to claim 1 , wherein an opening size of one side of the third sub-hole adjacent to the first stacked layer is greater than an opening size of one side of the second sub-hole adjacent to the base substrate. 3 . The display panel according to claim 1 , wherein an opening size of one side of the first sub-hole adjacent to the second sub-hole is greater than an opening size of one side of the second sub-hole adjacent to the first sub-hole. 4 . The display panel according to claim 1 , wherein the base substrate comprises a first substrate disposed adjacent to the first stacked layer, the first stacked layer is disposed on the first substrate, and the third sub-hole penetrates at least part of the first substrate. 5 . The display panel according to claim 1 , wherein the base substrate comprises a first substrate and a second substrate, the first stacked layer is disposed on the first substrate, the second substrate is disposed on one side of the first substrate away from the first stacked layer, and the third sub-hole penetrates through the first substrate and exposes part of the second substrate. 6 . The display panel according to claim 1 , wherein the base substrate further comprises a first substrate, a second substrate, and a first barrier layer disposed between the first substrate and the second substrate, and the third sub-hole penetrates through the first substrate and exposes part of the first barrier layer. 7 . The display panel according to claim 1 , wherein the display panel further comprises an encapsulation layer disposed on one side of the second electrode away from the light-emitting layer. 8 . The display panel according to claim 7 , wherein the encapsulation layer comprises a first sub-encapsulation layer and a second sub-encapsulation layer disposed in a stack, the first sub-encapsulation layer extends into the openings and covers the organic auxiliary layer, and the second sub-encapsulation layer is filled in the openings. 9 . The display panel according to claim 7 , wherein the display panel further comprises a transparent filler filled in the openings, and the encapsulation layer covers the transparent filler. 10 . An electronic device, comprising a display panel having pixel areas and transparent areas located between the pixel areas, wherein the display panel comprises: a base substrate; a first stacked layer disposed on the base substrate; and a second stacked layer disposed on one side of the first stacked layer away from the base substrate; wherein openings are defined on the second stacked layer corresponding to the transparent areas, each of the openings comprises a first sub-hole, a second sub-hole, and a third sub-hole intercommunicated to each other, the first sub-hole penetrates through the second stacked layer, the second sub-hole penetrates through the first stacked layer, and the third sub-hole penetrates through at least the part of the base substrate; wherein the second stacked layer comprises a planarization layer disposed on the first stacked layer and a pixel definition layer disposed on one side of the planarization layer away from the first stacked layer, and pixel openings are defined on the pixel definition layer corresponding to the pixel areas; wherein the display panel further comprises: a first electrode disposed on the planarization layer in the pixel areas, wherein the pixel openings expose part of the first electrode; an organic auxiliary layer covering the pixel definition layer, walls of the pixel openings and the first electrode; a light-emitting layer disposed in the pixel openings; and a second electrode disposed on a top surface of the light-emitting layer and a top surface of a part of the organic auxiliary layer covering the pixel definition layer; wherein the top surface of the light-emitting layer, the top surface of the part of the organic auxiliary layer covering the pixel definition layer, and a bottom surface of the second electrode layer line along a same plane; wherein the second electrode extends to the transparent areas and is defined with gaps corresponding to the openings; wherein the organic auxiliary layer extends into the openings in the transparent areas and is disconnected between the first stacked layer and the base substrate; and the organic auxiliary layer covers a first sidewall of the first sub-hole, a second sidewall of the second sub-hole, a third sidewall of the third sub-hole, and a bottom of the third sub-hole. 11 . The electronic device according to claim 10 , wherein an opening size of one side of the third sub-hole adjacent to the first stacked layer is greater than an opening size of one side of the second sub-hole adjacent to the base substrate. 12 . The electronic device according to claim 10 , wherein an opening size of one side of the first sub-hole adjacent to the second sub-hole is greater than an opening size of one side of the second sub-hole adjacent to the first sub-hole. 13 . The electronic device according to claim 10 , wherein the base substrate comprises a first substrate disposed adjacent to the first stacked layer, the first stacked layer is disposed on the first substrate, and the third sub-hole penetrates at least part of the first substrate. 14 . The electronic device according to claim 10 , wherein the base substrate comprises a fi
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