Display substrate with isolation groove disposed between pixels and display apparatus

US12575266B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12575266-B2
Application numberUS-202218023381-A
CountryUS
Kind codeB2
Filing dateMar 16, 2022
Priority dateMar 16, 2022
Publication dateMar 10, 2026
Grant dateMar 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate includes a light emitting structure layer arranged on a base substrate, the light emitting structure layer includes a first electrode layer, a pixel definition layer, a light emitting functional layer, a second electrode layer, a third electrode layer and an electrode insulation layer; the first electrode layer includes multiple first electrodes, and the pixel definition layer is provided with a pixel opening exposing a first electrode and a grid-shaped isolation groove structure; the third electrode layer and the electrode insulation layer are sequentially stacked on a side of the pixel definition layer the light emitting functional layer and the second electrode layer are sequentially stacked; the second electrode layer and the third electrode layer are configured to be equipotential; the light emitting functional layer includes at least two stacked light emitting units and a charge generation layer positioned between two adjacent light emitting units.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A display substrate, comprising: a driving structure layer and a light emitting structure layer sequentially stacked on a base substrate; wherein the light emitting structure layer comprises a first electrode layer, a pixel definition layer, a light emitting functional layer, a second electrode layer, a third electrode layer and an electrode insulation layer; the first electrode layer comprises a plurality of first electrodes arranged on the driving structure layer, the pixel definition layer is arranged on a side of the plurality of first electrodes away from the base substrate and is provided with a plurality of pixel openings, each of the pixel openings exposes a surface of one corresponding first electrode away from the base substrate; the pixel definition layer is further provided with a grid-shaped isolation groove structure, wherein the isolation groove structure comprises a plurality of grid units, and each grid unit of the isolation groove structure surrounds one of the pixel openings; the third electrode layer and the electrode insulation layer are sequentially stacked on a side of the pixel definition layer away from the base substrate and expose the pixel openings and the isolation groove structure, and the electrode insulation layer covers an edge portion of the third electrode layer close to a pixel opening; the light emitting functional layer and the second electrode layer are sequentially stacked on a side of the plurality of first electrodes and the electrode insulation layer away from the base substrate, and each first electrode, the light emitting functional layer and the second electrode layer form a light emitting device; the second electrode layer and the third electrode layer are configured to be equipotential; the light emitting functional layer comprises at least two stacked light emitting units, and a charge generation layer arranged between two adjacent light emitting units, wherein the charge generation layer is configured to generate holes and electrons under an action of a voltage of the first electrode and the second electrode layer, and the charge generation layer is isolated by the isolation groove structure. 2 . The display substrate according to of claim 1 , wherein, the third electrode layer is provided with a first opening exposing the pixel opening, and an orthographic projection of the first opening on the base substrate contains an orthographic projection of the pixel opening on the base substrate. 3 . The display substrate according to claim 2 , wherein the electrode insulation layer covers circumferential sidewalls of the pixel openings. 4 . The display substrate according to claim 1 , wherein the third electrode layer is provided with a second opening exposing the isolation groove structure, and an orthographic projection of the second opening on the base substrate contains an orthographic projection of the second opening on the base substrate. 5 . The display substrate according to claim 4 , wherein the electrode insulation layer is provided with a third opening exposing the isolation groove structure, and an orthographic projection of the third opening on the base substrate contains the orthographic projection of the second opening on the base substrate; an orthographic projection of the electrode insulation layer on the base substrate is overlapped with an orthographic projection of the isolation groove structure on the base substrate. 6 . The display substrate according to claim 1 , wherein an orthographic projection of the electrode insulation layer on the base substrate contains an orthographic projection of the third electrode layer on the base substrate. 7 . The display substrate according to claim 6 , wherein the third electrode layer is provided with a second opening exposing the isolation groove structure, the electrode insulation layer is provided with a third opening exposing the isolation groove structure, and an orthographic projection of the second opening on the base substrate contains an orthographic projection of the third opening on the base substrate. 8 . The display substrate according to claim 7 , wherein an orthographic projection of the isolation groove structure on the base substrate contains the orthographic projection of the third opening on the base substrate. 9 . The display substrate according to claim 1 , wherein a sidewall of a first electrode in a thickness direction is slope-shaped and an included angle between the sidewall of the first electrode in the thickness direction and a surface of the first electrode facing the base substrate is 60 degrees to 80 degrees. 10 . The display substrate according to claim 1 , wherein an inner side surface of the isolation groove structure is an arc-shaped concave surface. 11 . The display substrate according to claim 10 , wherein a bottom surface of the isolation groove structure is an arc-shaped concave surface that is recessed towards the base substrate. 12 . The display substrate according to claim 11 , wherein the inner side surface of the isolation groove structure is smoothly connected with the bottom surface. 13 . The display substrate according to claim 1 , wherein the isolation groove structure penetrates through the pixel definition layer and is partially located in the driving structure layer. 14 . The display substrate according to claim 1 , wherein a material of the electrode insulation layer comprises any one or more of silicon nitride, silicon oxide and silicon oxynitride. 15 . The display substrate according to claim 1 , wherein the light emitting functional layer comprises a first light emitting unit, the charge generation layer, and a second light emitting unit that are sequentially stacked in a direction away from the base substrate; the first light emitting unit comprises a first light emitting layer capable of emitting red light and a second light emitting layer capable of emitting green light that are stacked, and the second light emitting unit comprises a third light emitting layer capable of emitting blue light. 16 . A display apparatus, comprising the display substrate according to claim 1 .

Assignees

Inventors

Classifications

  • comprising red-green-blue [RGB] subpixels · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

  • Insulating layers formed between TFT elements and OLED elements · CPC title

  • H10K59/122Primary

    Pixel-defining structures or layers, e.g. banks · CPC title

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What does patent US12575266B2 cover?
A display substrate includes a light emitting structure layer arranged on a base substrate, the light emitting structure layer includes a first electrode layer, a pixel definition layer, a light emitting functional layer, a second electrode layer, a third electrode layer and an electrode insulation layer; the first electrode layer includes multiple first electrodes, and the pixel definition lay…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/122. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).