Display panel and an electronic device

US12575233B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12575233-B2
Application numberUS-202117618425-A
CountryUS
Kind codeB2
Filing dateOct 12, 2021
Priority dateSep 24, 2021
Publication dateMar 10, 2026
Grant dateMar 10, 2026

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a display panel and an electronic device, the display panel comprises a substrate and a plurality of light-emitting units, a plurality of power wires, and an auxiliary electrode disposed on the substrate; the power wires extend in a first direction, and are disposed between adjacent light-emitting units, and the power wires are connected to the light-emitting units; and the auxiliary electrode disposed on a surface of the power wires close to or away from the substrate; the power wires comprise a plurality of wire segments, each of the wire segments corresponds to one of the light-emitting units, and each of the wire segments is connected to the auxiliary electrode.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel, comprising: a substrate; a plurality of light-emitting units disposed on the substrate; a plurality of power wires disposed on the substrate, wherein the power wires extend in a first direction and are disposed between adjacent light-emitting units, and the power wires are connected to the light-emitting units; and an auxiliary electrode disposed on a surface of the power wires close to or away from the substrate, wherein the power wires comprise a plurality of wire segments, each of the wire segments corresponds to one of the light-emitting units, and each of the wire segments is connected to the auxiliary electrode; and in a top view of the display panel, orthographic projections of the power wires on the substrate are located within an orthographic projection of the auxiliary electrode on the substrate. 2 . The display panel according to claim 1 , wherein the display panel further comprises an insulating layer, the insulating layer disposed between the power wires and the auxiliary electrode, a through hole is disposed in the insulating layer, and the wire segments and the auxiliary electrode are connected in the through hole. 3 . The display panel according to claim 2 , wherein in the top view of the display panel, an opening area of the through hole gradually increases along the first direction. 4 . The display panel according to claim 1 , wherein the auxiliary electrode is configured as a whole layer without providing any opening. 5 . The display panel according to claim 1 , wherein the display panel further comprises a plurality of auxiliary power wires disposed on the substrate, and the plurality of auxiliary power wires intersect with the power wires to form a mesh structure, the wire segments and the auxiliary electrode are connected in an area where the auxiliary power wires and the power wires intersect. 6 . The display panel according to claim 1 , wherein the display panel further comprises a driving chip, the driving chip is connected to a surface of the substrate, and the power wires and the auxiliary electrode are both connected to the driving chip. 7 . The display panel according to claim 6 , wherein the power wires comprise a plurality of first power wires and a plurality of second power wires disposed on the substrate, the plurality of first power wires and the plurality of second power wires are disposed in different layers, the first power wires are located on a surface of the second power wires close to the substrate, and the first power wires and the second power wires both extend along the first direction and are disposed between adjacent light-emitting units; the driving chip comprises a first driving chip and a second driving chip, the first driving chip and the second driving chip are both connected to a surface of the substrate; the auxiliary electrode comprises a first auxiliary electrode and a second auxiliary electrode disposed in different layers, the first auxiliary electrode is located between the substrate and the first power wires, and the second auxiliary electrode is located on a surface of the second power wires away from the substrate; the first power wires and the first auxiliary electrode are both connected to the first driving chip, the second power wires and the second auxiliary electrode are both connected to the second driving chip; wherein the first power wires comprise a plurality of first wire segments, the second power wires comprise a plurality of second wire segments, and each of the first wire segments and each of the second wire segments are corresponding to one of the light-emitting units, and each of the first wire segments is connected to the first auxiliary electrode, and each of the second wire segments is connected to the second auxiliary electrode. 8 . The display panel according to claim 7 , wherein the display panel further comprises a first insulating layer and a second insulating layer, the first insulating layer is located between the first auxiliary electrode and the first power wire, and the second insulating layer is located between the second power wires and the second auxiliary electrode; and a first through hole is disposed in the first insulating layer, and the first wire segments and the first auxiliary electrode are connected in the first through hole; a second through hole is disposed in the second insulating layer, the second wire segments and the second auxiliary electrode are connected in the second through hole. 9 . The display panel according to claim 7 , wherein the first power wires are positive polarity power wires, and the second power wires are negative polarity power wires; and/or the display panel further comprises a plurality of first auxiliary power wires and a plurality of second auxiliary power wires disposed on the substrate; the plurality of first auxiliary power wires intersect with the plurality of the first power wires to form a first mesh structure, and the plurality of second auxiliary power wires intersect with the plurality of second power wires to form a second mesh structure. 10 . The display panel according to claim 1 , wherein the power wires comprise a plurality of first power wires and a plurality of second power wires disposed on the substrate, the plurality of first power wires and the plurality of second power wires are disposed in different layers, the first power wires are located on a surface of the second power wires close to the substrate, and the first power wires and the second power wires both extend along the first direction and are disposed between adjacent light-emitting units; the display panel comprises a first driving chip and a second driving chip, the first driving chip and the second driving chip are both connected to a surface of the substrate; the auxiliary electrode comprises a first auxiliary electrode and a second auxiliary electrode disposed in different layers, the first auxiliary electrode is located between the substrate and the first power wires, and the second auxiliary electrode is located on a surface of the second power wires away from the substrate; the first power wires and the first auxiliary electrode are both connected to the first driving chip, the second power wires and the second auxiliary electrode are both connected to the second driving chip; and the first power wires comprise a plurality of first wire segments, the second power wires comprise a plurality of second wire segments, and each of the first wire segments and each of the second wire segments are corresponding to one of the light-emitting units, and each of the first wire segments is connected to the first auxiliary electrode, and each of the second wire segments is connected to the second auxiliary electrode; and an orthographic projection of the first auxiliary electrode on the plane where the substrate is located completely covers orthographic projections of the first power wires on the plane where the substrate is located, and an orthographic projection of the second auxiliary electrode on the plane where the substrate is located completely covers orthographic projections of the second power wires on the plane where the substrate is located. 11 . The display panel according to claim 10 , wherein in the top view of the display panel, orthographic projections of the first power wires on the substrate are located within an orthographic projection of the first auxiliary electrode on the substrate, and orthographic projections of the second power wires on the substrate are located within an orthographic projection of the second auxiliary electrode on the substrate. 12 . The display panel according to claim 1 ,

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • Interconnections, e.g. wiring lines or terminals (connection of the pixel electrodes to the driving transistors H10H29/39) · CPC title

  • Connection of the pixel electrodes to the driving transistors · CPC title

  • H10H20/857Primary

    Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

  • H10H29/142Primary

    Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

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Frequently asked questions

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What does patent US12575233B2 cover?
The present disclosure provides a display panel and an electronic device, the display panel comprises a substrate and a plurality of light-emitting units, a plurality of power wires, and an auxiliary electrode disposed on the substrate; the power wires extend in a first direction, and are disposed between adjacent light-emitting units, and the power wires are connected to the light-emitting uni…
Who is the assignee on this patent?
Huizhou China Star Optoelectronics Display Co Ltd, Shenzhen China Star Optoelectronics Semiconductor Display Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).