Semiconductor device and method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-12575167-B2
Application number	US-202318298030-A
Country	US
Kind code	B2
Filing date	Apr 10, 2023
Priority date	Aug 24, 2022
Publication date	Mar 10, 2026
Grant date	Mar 10, 2026

Abstract

To provide a semiconductor device that includes: a semiconductor substrate provided with a semiconductor portion that is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region; an insulating film provided on the semiconductor portion; a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and a plated electrode provided at at least a portion of an inside of the opening using the metal electrode as a material to be plated.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a semiconductor substrate provided with a semiconductor portion which is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region; an insulating film provided on the semiconductor portion; a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and a plated electrode provided at at least a portion of an inside of the opening using the metal electrode as a material to be plated, wherein the semiconductor portion includes the pn junction provided in a temperature sense diode region of the semiconductor substrate, and at least a part of the lower surface of the plated electrode is in direct contact with the insulating film.

2 . The semiconductor device according to claim 1 , wherein
the semiconductor portion includes the gate insulating film provided in an active trench gate of an IGBT region of the semiconductor substrate.

3 . The semiconductor device according to claim 2 , wherein the entire lower surface of the plated electrode in the opening is in direct contact with the insulating film.

4 . The semiconductor device according to claim 1 , wherein the entire lower surface of the plated electrode in the opening is in direct contact with the insulating film.

5 . The semiconductor device according to claim 1 , the semiconductor device further comprising a semi-insulating protection film that is provided in the opening and separates the plated electrode.

6 . The semiconductor device according to claim 5 , wherein
the plated electrode is provided on a side wall of the opening, and the entire lower surface of the plated electrode in the opening is in direct contact with the insulating film.

7 . The semiconductor device according to claim 1 , wherein
the semiconductor portion includes the pn junction provided in the terminal region.

8 . A semiconductor device comprising:
a semiconductor substrate provided with a semiconductor portion which is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region; an insulating film provided on the semiconductor portion; a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and a plated electrode provided at at least a portion of an inside of the opening using the metal electrode as a material to be plated, wherein the semiconductor portion includes the drift layer provided in the terminal region, the drift layer being in direct contact with the insulating film, and at least a part of the lower surface of the plated electrode is in direct contact with the insulating film.

9 . The semiconductor device according to claim 8 , wherein
the plated electrode is provided on the side wall of the opening, and the entire lower surface of the plated electrode in the opening is in direct contact with the insulating film.

10 . The semiconductor device according to claim 8 , the semiconductor device further comprising a semi-insulating protection film that is provided in the opening and separates the plated electrode.

11 . The semiconductor device according to claim 8 , wherein
the semiconductor portion includes the pn junction provided in the terminal region.

12 . A method of manufacturing a semiconductor device, the method comprising:
forming a semiconductor portion that is provided on a semiconductor substrate and is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region, and an insulating film provided on the semiconductor portion; forming a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and forming a plated electrode at at least a portion of an inside of the opening using the metal electrode as a material to be plated, wherein the semiconductor portion includes the pn junction provided in a temperature sense diode region of the semiconductor substrate, and at least a part of the lower surface of the plated electrode is in direct contact with the insulating film.

13 . A method of manufacturing a semiconductor device, the method comprising:
forming a semiconductor portion that is provided on a semiconductor substrate and is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region, and an insulating film provided on the semiconductor portion; forming a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and forming a plated electrode at at least a portion of an inside of the opening using the metal electrode as a material to be plated, wherein the semiconductor portion includes the drift layer provided in the terminal region, the drift layer being in direct contact with the insulating film, and at least a part of the lower surface of the plated electrode is in direct contact with the insulating film.

Assignees

• Mitsubishi Electric Corp

Inventors

• Fujii Hidenori
• Tanaka Koji
• Tanaka Sho
• Soneda Shinya

Classifications

• H10W40/00

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title

• H10D12/481 Primary

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D12/038

  having a recessed gate, e.g. trench-gate IGBTs · CPC title

• H10D8/00

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title

• H10D8/422

  PN diodes having the PN junctions in mesas · CPC title